DS26518GN+ Maxim Integrated Products, DS26518GN+ Datasheet - Page 11

• Manufacturer Part Number: DS26518GN+
• Description: IC TXRX T1/E1/J1 8PORT 256-CSBGA
• Manufacturer: Maxim Integrated Products
• Type: Transceiverr

Specifications of DS26518GN+

• Number Of Drivers/receivers: 8/8
• Protocol: T1/E1/J1
• Voltage - Supply: 3.135 V ~ 3.465 V
• Mounting Type: Surface Mount
• Package / Case: 256-CSBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

2.5
2.6
S Fully independent transmit and receive functionality
S Full receive and transmit path transparency
S T1 framing formats D4 and ESF per T1.403 and expanded SLC-96 support (TR-TSY-008)
S E1 FAS framing and CRC-4 multiframe per G.704/G.706, and G.732 CAS multiframe
S Transmit-side synchronizer
S Transmit midpath CRC recalculate (E1)
S Detailed alarm and status reporting with optional interrupt support
S Large path and line error counters
S DS1 Idle Code Generation on a per-channel basis in both transmit and receive paths
S ANSI T1.403-1999 support
S G.965 V5.2 link detect
S Ability to monitor one DS0 channel in both the transmit and receive paths
S In-band repeating pattern generators and detectors
S Bit oriented code (BOC) support
S Flexible signaling support
S Automatic RAI generation to ETS 300 011 specifications
S RAI-CI and AIS-CI support
S Expanded access to Sa and Si bits
S Option to extend carrier loss criteria to a 1ms period as per ETS 300 233
S Japanese J1 support
S Ability to calculate and check CRC-6 according to the Japanese standard
S Ability to generate Yellow Alarm according to the Japanese standard
S T1-to-E1 conversion
S Independent two-frame receive and transmit elastic stores
S Independent control and clocking
S Controlled slip capability with status
S Minimum delay mode supported
S Flexible TDM backplane supports bus rates from 1.544MHz to 16.384MHz
S Supports T1 to CEPT (E1) conversion
S Programmable output clocks for fractional T1, E1, H0, and H12 applications
S Interleaving PCM bus operation
S Hardware signaling capability
S Receive signaling reinsertion to a backplane multiframe sync
S Availability of signaling in a separate PCM data stream
Framer/Formatter
 T1: BPV, CV, CRC-6, and framing bit errors
 E1: BPV, CV, CRC-4, E-bit, and frame alignment errors
 Timed or manual update modes
 User defined
 Digital Milliwatt
 Three independent generators and detectors
 Patterns from 1 to 8 bits or 16 bits in length
 Software or hardware based
 Interrupt generated on change of signaling data
 Optional receive signaling freeze on loss of frame, loss of signal, or frame slip
 Hardware pins provided to indicate loss of frame (LOF), loss of signal (LOS), loss of transmit clock
System Interface
(LOTC), or signaling freeze condition
11 of 286
DS26518 8-Port T1/E1/J1 Transceiver