PIC16C71-04/P Microchip Technology Inc., PIC16C71-04/P Datasheet - Page 83

• Manufacturer Part Number: PIC16C71-04/P
• Description: 18 PIN, 1.75 KB OTP, 36 RAM, 13 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16C71-04/P

• A/d Inputs: 4-Channel, 8-Bit
• Cpu Speed: 5 MIPS
• Eeprom Memory: 0 Bytes
• Input Output: 13
• Memory Type: OTP
• Number Of Bits: 8
• Package Type: 18-pin PDIP
• Programmable Memory: 1.75K Bytes
• Ram Size: 36 Bytes
• Speed: 20 MHz
• Timers: 1-8-bit
• Voltage, Range: 3-6 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

SUBWF
Syntax:
Operands:
Operation:
Status Affected: C, DC, Z
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Example 1:
Example 2:
Example 3:
1997 Microchip Technology Inc.
Subtract W from f
[ label ]
0
d
(f) - (W)
Subtract (2’s complement method) W reg-
ister from register 'f'. If 'd' is 0 the result is
stored in the W register. If 'd' is 1 the
result is stored back in register 'f'.
1
1
SUBWF
Before Instruction
After Instruction
Before Instruction
After Instruction
Before Instruction
After Instruction
Decode
Q1
f
00
[0,1]
REG1
W
C
Z
REG1
W
C
Z
REG1
W
C
Z
REG1
W
C
Z
REG1
W
C
Z
REG1
W
C
Z
127
register 'f'
SUBWF f,d
REG1,1
dest)
0010
Read
Q2
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
3
2
?
?
1
2
1; result is positive
0
2
2
?
?
0
2
1; result is zero
1
1
2
?
?
0xFF
2
0; result is negative
0
Process
dfff
data
Q3
Write to
ffff
dest
Q4
SWAPF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Example
TRIS
Operands:
Syntax:
Operation:
Status Affected: None
Encoding:
Description:
Words:
Cycles:
Example
Swap Nibbles in f
[ label ] SWAPF f,d
0
d
(f<3:0>)
(f<7:4>)
None
The upper and lower nibbles of regis-
ter 'f' are exchanged. If 'd' is 0 the
result is placed in W register. If 'd' is 1
the result is placed in register 'f'.
1
1
Before Instruction
After Instruction
Load TRIS Register
[ label ]
5
(W)
The instruction is supported for code
compatibility with the PIC16C5X prod-
ucts. Since TRIS registers are read-
able and writable, the user can directly
address them.
1
1
To maintain upward compatibility
with future PIC16CXX products, do
not use this instruction.
Decode
SWAPF REG,
Q1
00
00
f
f
[0,1]
PIC16C71X
127
7
TRIS register f;
TRIS
register 'f'
0000
REG1
REG1
W
1110
(dest<7:4>),
(dest<3:0>)
Read
Q2
DS30272A-page 83
f
0
0110
Process
dfff
=
=
=
data
Q3
0xA5
0xA5
0x5A
0fff
Write to
ffff
dest
Q4