PIC16C71-04/P Microchip Technology Inc., PIC16C71-04/P Datasheet - Page 28

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PIC16C71-04/P

Manufacturer Part Number
PIC16C71-04/P
Description
18 PIN, 1.75 KB OTP, 36 RAM, 13 I/O
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC16C71-04/P

A/d Inputs
4-Channel, 8-Bit
Cpu Speed
5 MIPS
Eeprom Memory
0 Bytes
Input Output
13
Memory Type
OTP
Number Of Bits
8
Package Type
18-pin PDIP
Programmable Memory
1.75K Bytes
Ram Size
36 Bytes
Speed
20 MHz
Timers
1-8-bit
Voltage, Range
3-6 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

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PIC16C71X
FIGURE 5-4:
TABLE 5-3:
DS30272A-page 28
Set RBIF
Name
RB0/INT
RB7
Legend: TTL = TTL input, ST = Schmitt Trigger input
Note 1: This buffer is a Schmitt Trigger input when configured as the external interrupt.
RB1
RB2
RB3
RB4
RB5
RB6
Data bus
WR TRIS
WR Port
RBPU
RB7:RB6 in serial programming mode
Note 1: I/O pins have diode protection to V
2: This buffer is a Schmitt Trigger input when used in serial programming mode.
2: TRISB = ’1’ enables weak pull-up if
(2)
From other
RB7:RB4 pins
RBPU = ’0’ (OPTION<7>).
Bit#
bit0
bit1
bit2
bit3
bit4
bit5
bit6
bit7
BLOCK DIAGRAM OF
RB7:RB4 PINS
(PIC16C71)
PORTB FUNCTIONS
RD TRIS
RD Port
Data Latch
TRIS Latch
D
D
CK
CK
Q
Q
TTL/ST
TTL/ST
TTL/ST
Buffer
TTL
TTL
TTL
TTL
TTL
Q
Q
Latch
(1)
(2)
(2)
DD
EN
EN
D
D
TTL
Input
Buffer
and V
Function
Input/output pin or external interrupt input. Internal software
programmable weak pull-up.
Input/output pin. Internal software programmable weak pull-up.
Input/output pin. Internal software programmable weak pull-up.
Input/output pin. Internal software programmable weak pull-up.
Input/output pin (with interrupt on change). Internal software programmable
weak pull-up.
Input/output pin (with interrupt on change). Internal software programmable
weak pull-up.
Input/output pin (with interrupt on change). Internal software programmable
weak pull-up. Serial programming clock.
Input/output pin (with interrupt on change). Internal software programmable
weak pull-up. Serial programming data.
V
RD Port
SS
P
DD
.
Buffer
weak
pull-up
I/O
pin
ST
(1)
FIGURE 5-5:
Data bus
WR Port
WR TRIS
RBPU
RB7:RB6 in serial programming mode
Set RBIF
Note 1: I/O pins have diode protection to V
From other
RB7:RB4 pins
2: TRISB = ’1’ enables weak pull-up if
(2)
RBPU = ’0’ (OPTION<7>).
RD TRIS
RD Port
Data Latch
TRIS Latch
D
D
BLOCK DIAGRAM OF
RB7:RB4 PINS
(PIC16C710/711/715)
CK
CK
Q
Q
1997 Microchip Technology Inc.
Q
Q
Latch
DD
EN
EN
D
D
TTL
Input
Buffer
and V
V
P
SS
DD
.
weak
pull-up
RD Port
Buffer
I/O
pin
Q1
Q3
(1)
ST

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