PIC16C71-04/P Microchip Technology Inc., PIC16C71-04/P Datasheet - Page 16

• Manufacturer Part Number: PIC16C71-04/P
• Description: 18 PIN, 1.75 KB OTP, 36 RAM, 13 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16C71-04/P

• A/d Inputs: 4-Channel, 8-Bit
• Cpu Speed: 5 MIPS
• Eeprom Memory: 0 Bytes
• Input Output: 13
• Memory Type: OTP
• Number Of Bits: 8
• Package Type: 18-pin PDIP
• Programmable Memory: 1.75K Bytes
• Ram Size: 36 Bytes
• Speed: 20 MHz
• Timers: 1-8-bit
• Voltage, Range: 3-6 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

PIC16C71X
TABLE 4-2:
DS30272A-page 16
80h
81h
82h
83h
84h
85h
86h
87h
88h
89h
8Ah
8Bh
8Ch
8Dh
8Eh
8Fh
90h
91h
92h
93h
94h
95h
96h
97h
98h
99h
9Ah
9Bh
9Ch
9Dh
9Eh
9Fh
Legend: x = unknown, u = unchanged, q = value depends on condition, - = unimplemented read as '0'.
Note 1: These registers can be addressed from either bank.
Address Name
Bank 1
(1)
(1)
(1)
(1)
(1,2)
(1)
2: The upper byte of the program counter is not directly accessible. PCLATH is a holding register for the PC<12:8> whose
3: Other (non power-up) resets include external reset through MCLR and Watchdog Timer Reset.
4: The IRP and RP1 bits are reserved on the PIC16C715, always maintain these bits clear.
INDF
OPTION
PCL
STATUS
FSR
TRISA
TRISB
PCLATH
INTCON
PIE1
PCON
ADCON1
Shaded locations are unimplemented, read as ‘0’.
contents are transferred to the upper byte of the program counter.
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
PIC16C715 SPECIAL FUNCTION REGISTER SUMMARY (Cont.’d)
Addressing this location uses contents of FSR to address data memory (not a physical register)
Program Counter's (PC) Least Significant Byte
Indirect data memory address pointer
PORTB Data Direction Register
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
MPEEN
RBPU
IRP
Bit 7
GIE
—
—
—
—
(4)
INTEDG
RP1
ADIE
Bit 6
PEIE
—
—
—
—
(4)
PORTA Data Direction Register
T0CS
Bit 5
T0IE
RP0
—
—
—
—
Write Buffer for the upper 5 bits of the PC
T0SE
INTE
Bit 4
TO
—
—
—
RBIE
Bit 3
PSA
PD
—
—
—
Bit 2
T0IF
PER
PS2
—
—
Z
PCFG1
INTF
POR
Bit 1
PS1
DC
—
PCFG0
1997 Microchip Technology Inc.
RBIF
BOR
Bit 0
PS0
—
C
0000 0000 0000 0000
1111 1111 1111 1111
0000 0000 0000 0000
0001 1xxx 000q quuu
xxxx xxxx uuuu uuuu
--11 1111 --11 1111
1111 1111 1111 1111
---0 0000 ---0 0000
0000 000x 0000 000u
-0-- ---- -0-- ----
u--- -1qq u--- -1uu
---- --00
BOR, PER
Value on:
POR,
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
other resets
Value on all
---- --00
(3)
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