PIC16C71-04/P Microchip Technology Inc., PIC16C71-04/P Datasheet - Page 52

• Manufacturer Part Number: PIC16C71-04/P
• Description: 18 PIN, 1.75 KB OTP, 36 RAM, 13 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16C71-04/P

• A/d Inputs: 4-Channel, 8-Bit
• Cpu Speed: 5 MIPS
• Eeprom Memory: 0 Bytes
• Input Output: 13
• Memory Type: OTP
• Number Of Bits: 8
• Package Type: 18-pin PDIP
• Programmable Memory: 1.75K Bytes
• Ram Size: 36 Bytes
• Speed: 20 MHz
• Timers: 1-8-bit
• Voltage, Range: 3-6 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

PIC16C71X
8.3
The PIC16CXX differentiates between various kinds of
reset:
• Power-on Reset (POR)
• MCLR reset during normal operation
• MCLR reset during SLEEP
• WDT Reset (normal operation)
• Brown-out Reset (BOR) (PIC16C710/711/715)
• Parity Error Reset (PIC16C715)
Some registers are not affected in any reset condition;
their status is unknown on POR and unchanged in any
other reset. Most other registers are reset to a “reset
state” on Power-on Reset (POR), on the MCLR and
FIGURE 8-9:
DS30272A-page 52
Applicable Devices
MCLR/V
Note 1: This is a separate oscillator from the RC oscillator of the CLKIN pin.
OSC1/
CLKIN
V
Pin
DD
2: Brown-out Reset is implemented on the PIC16C710/711/715.
3: Parity Error Reset is implemented on the PIC16C715.
Reset
PP
On-chip
RC OSC
Pin
OST/PWRT
Brown-out
Program
Memory
Parity
V
Module
Reset
(1)
SIMPLIFIED BLOCK DIAGRAM OF ON-CHIP RESET CIRCUIT
detect
WDT
DD
rise
(3)
OST
PWRT
(2)
SLEEP
10-bit Ripple-counter
10-bit Ripple-counter
710 71 711 715
WDT Time-out
Power-on Reset
MPEEN
BODEN
External
Reset
Enable PWRT
Enable OST
WDT Reset, on MCLR reset during SLEEP, and Brown-
out Reset (BOR). They are not affected by a WDT
Wake-up, which is viewed as the resumption of normal
operation. The TO and PD bits are set or cleared differ-
ently in different reset situations as indicated in Table 8-
7, Table 8-8 and Table 8-9. These bits are used in soft-
ware to determine the nature of the reset. See Table 8-
10 and Table 8-11 for a full description of reset states
of all registers.
A simplified block diagram of the on-chip reset circuit is
shown in Figure 8-9.
The PIC16C710/711/715 have a MCLR noise filter in
the MCLR reset path. The filter will detect and ignore
small pulses.
It should be noted that a WDT Reset does not drive
MCLR pin low.
See Table 8-6 for time-out situations.
1997 Microchip Technology Inc.
S
R
Q
Chip_Reset