PIC16C71-04/P Microchip Technology Inc., PIC16C71-04/P Datasheet - Page 80
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PIC16C71-04/P
Manufacturer Part Number
PIC16C71-04/P
Description
18 PIN, 1.75 KB OTP, 36 RAM, 13 I/O
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC16C71-04P.pdf
(177 pages)
Specifications of PIC16C71-04/P
A/d Inputs
4-Channel, 8-Bit
Cpu Speed
5 MIPS
Eeprom Memory
0 Bytes
Input Output
13
Memory Type
OTP
Number Of Bits
8
Package Type
18-pin PDIP
Programmable Memory
1.75K Bytes
Ram Size
36 Bytes
Speed
20 MHz
Timers
1-8-bit
Voltage, Range
3-6 V
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16C71-04/P
Manufacturer:
GRENERE
Quantity:
2 000
Part Number:
PIC16C71-04/P
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
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PIC16C71X
RETLW
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Example
DS30272A-page 80
2nd Cycle
1st Cycle
TABLE
Return with Literal in W
[ label ]
0
k
TOS
None
The W register is loaded with the eight
bit literal 'k'. The program counter is
loaded from the top of the stack (the
return address). This is a two cycle
instruction.
1
2
CALL TABLE ;W contains table
•
•
•
ADDWF PC
RETLW k1
RETLW k2
•
•
•
RETLW kn
Before Instruction
After Instruction
Decode
NOP
Q1
11
k
(W);
255
PC
W
W
RETLW k
literal 'k'
;W = offset
;Begin table
;
; End of table
01xx
Read
NOP
;offset value
Q2
;W now has table value
=
=
0x07
value of k8
kkkk
NOP
NOP
Q3
from the
Write to
kkkk
W, Pop
Stack
NOP
Q4
RETURN
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Example
2nd Cycle
1st Cycle
Return from Subroutine
[ label ]
None
TOS
None
Return from subroutine. The stack is
POPed and the top of the stack (TOS)
is loaded into the program counter.
This is a two cycle instruction.
1
2
After Interrupt
RETURN
Decode
NOP
Q1
00
1997 Microchip Technology Inc.
PC
PC =
RETURN
0000
NOP
NOP
Q2
TOS
0000
NOP
NOP
Q3
the Stack
Pop from
1000
NOP
Q4
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