PIC18F45K22-I/P Microchip Technology Inc., PIC18F45K22-I/P Datasheet - Page 341
![no-image](/images/manufacturer_photos/0/4/440/microchip_technology_inc__sml.jpg)
PIC18F45K22-I/P
Manufacturer Part Number
PIC18F45K22-I/P
Description
40 PDIP .600in TUBE, 32KB, Flash, 1536bytes-RAM, 8-bit Family, nanoWatt XLP
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC18F45K22-IP.pdf
(496 pages)
Specifications of PIC18F45K22-I/P
A/d Inputs
28-Channel, 10-Bit
Comparators
2
Cpu Speed
16 MIPS
Eeprom Memory
256 Bytes
Input Output
35
Interface
I2C/SPI/UART/USART
Memory Type
Flash
Number Of Bits
8
Package Type
40-pin PDIP
Programmable Memory
32K Bytes
Ram Size
1.5K Bytes
Speed
64 MHz
Temperature Range
–40 to 125 °C
Timers
3-8-bit, 4-16-bit
Voltage, Range
1.8-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
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22.7
When the device wakes up from Sleep through an
interrupt or a Watchdog Timer time-out, the contents of
the VREFCON1 register are not affected. To minimize
current consumption in Sleep mode, the voltage
reference should be disabled.
REGISTER 22-1:
2010 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
bit 7
bit 6
bit 5
bit 4
bit 3-2
bit 1
bit 0
DACEN
R/W-0
Operation During Sleep
DACEN: DAC Enable bit
1 = DAC is enabled
0 = DAC is disabled
DACLPS: DAC Low-Power Voltage Source Select bit
1 = DAC Positive reference source selected
0 = DAC Negative reference source selected
DACOE: DAC Voltage Output Enable bit
1 = DAC voltage level is also an output on the DACOUT pin
0 = DAC voltage level is disconnected from the DACOUT pin
Unimplemented: Read as ‘0’
DACPSS<1:0>: DAC Positive Source Select bits
00 = V
01 = V
10 = FVR BUF1 output
11 = Reserved, do not use
Unimplemented: Read as ‘0’
DACNSS: DAC Negative Source Select bits
1 = V
0 = V
DACLPS
R/W-0
REF
VREFCON1: VOLTAGE REFERENCE CONTROL REGISTER 0
SS
REF
DD
-
+
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
DACOE
R/W-0
U-0
Preliminary
—
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
R/W-0
22.8
A device Reset affects the following:
• DAC is disabled
• DAC output voltage is removed from the
• The DAC1R<4:0> range select bits are cleared
DACOUT pin
DACPSS<1:0>
PIC18(L)F2X/4XK22
Effects of a Reset
R/W-0
U-0
—
DS41412D-page 341
DACNSS
R/W-0
bit 0
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