PIC18F45K22-I/P Microchip Technology Inc., PIC18F45K22-I/P Datasheet - Page 179

• Manufacturer Part Number: PIC18F45K22-I/P
• Description: 40 PDIP .600in TUBE, 32KB, Flash, 1536bytes-RAM, 8-bit Family, nanoWatt XLP
• Manufacturer: Microchip Technology Inc.

Specifications of PIC18F45K22-I/P

• A/d Inputs: 28-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 16 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 35
• Interface: I2C/SPI/UART/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 40-pin PDIP
• Programmable Memory: 32K Bytes
• Ram Size: 1.5K Bytes
• Speed: 64 MHz
• Temperature Range: –40 to 125 °C
• Timers: 3-8-bit, 4-16-bit
• Voltage, Range: 1.8-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

14.1.4
There are four prescaler settings specified by the
CCPxM<3:0> bits of the CCPxCON register. Whenever
the CCP module is turned off, or the CCP module is not
in Capture mode, the prescaler counter is cleared. Any
Reset will clear the prescaler counter.
Switching from one capture prescaler to another does
not clear the prescaler and may generate a false
interrupt. To avoid this unexpected operation, turn the
module off by clearing the CCPxCON register before
changing the prescaler.
the code to perform this function.
EXAMPLE 14-1:
TABLE 14-3:
 2010 Microchip Technology Inc.
CCP1CON
CCP2CON
CCP3CON
CCP4CON
CCP5CON
CCPR1H
CCPR1L
CCPR2H
CCPR2L
CCPR3H
CCPR3L
CCPR4H
CCPR4L
CCPR5H
CCPR5L
CCPTMRS0
CCPTMRS1
INTCON
IPR1
IPR2
IPR4
PIE1
Legend: — = Unimplemented location, read as ‘0’. Shaded bits are not used by Capture mode.
Note
#define NEW_CAPT_PS 0x06
...
CCPxCON = 0;
CCPxCON = NEW_CAPT_PS;
Name
1:
These registers/bits are available on PIC18(L)F4XK22 devices.
CCP PRESCALER
GIE/GIEH
OSCFIP
Bit 7
REGISTERS ASSOCIATED WITH CAPTURE
—
—
—
—
—
—
C3TSEL<1:0>
P1M<1:0>
P2M<1:0>
P3M<1:0>
CHANGING BETWEEN
CAPTURE PRESCALERS
Example 14-1
PEIE/GIEL
ADIP
ADIE
Bit 6
C1IP
—
—
—
—
//Capture
// Prescale 4th
// rising edge
// Turn the CCP
// Module Off
// Turn CCP module
// on with new
// prescale value
Capture/Compare/PWM Register 1 High Byte (MSB)
Capture/Compare/PWM Register 2 High Byte (MSB)
Capture/Compare/PWM Register 3 High Byte (MSB)
Capture/Compare/PWM Register 4 High Byte (MSB)
Capture/Compare/PWM Register 5 High Byte (MSB)
TMR0IE
Capture/Compare/PWM Register 1 Low Byte (LSB)
Capture/Compare/PWM Register 2 Low Byte (LSB)
Capture/Compare/PWM Register 3 Low Byte (LSB)
Capture/Compare/PWM Register 4 Low Byte (LSB)
Capture/Compare/PWM Register 5 Low Byte (LSB)
RC1IP
RC1IE
demonstrates
C2IP
Bit 5
—
—
—
DC1B<1:0>
DC2B<1:0>
DC3B<1:0>
DC4B<1:0>
DC5B<1:0>
Preliminary
INT0IE
TX1IP
TX1IE
EEIP
Bit 4
—
—
C2TSEL<1:0>
14.1.5
Capture mode requires a 16-bit TimerX module for use
as a time base. There are four options for driving the
16-bit TimerX module in Capture mode. It can be driven
by the system clock (F
4), or by the external clock sources, the Secondary
Oscillator (S
16-bit TimerX resource is clocked by F
TimerX will not increment during Sleep. When the
device wakes from Sleep, TimerX will continue from its
previous state. Capture mode will operate during Sleep
when the 16-bit TimerX resource is clocked by one of
the external clock sources (S
SSP1IP
SSP1IE
BCL1IP
RBIE
Bit 3
PIC18(L)F2X/4XK22
—
C5TSEL<1:0>
CAPTURE DURING SLEEP
OSC
TMR0IF
CCP1IP
HLVDIP
CCP5IP
CCP1IE
CCP1M<3:0>
CCP2M<3:0>
CCP3M<3:0>
CCP4M<3:0>
CCP5M<3:0>
Bit 2
), or the TxCKI clock input. When the
—
OSC
), the instruction clock (F
TMR2IP
TMR3IP
TMR2IE
CCP4IP
INT0IF
Bit 1
C1TSEL<1:0>
C4TSEL<1:0>
OSC
or the TxCKI pin).
DS41412D-page 179
TMR1IP
CCP2IP
CCP3IP
TMR1IE
RBIF
Bit 0
OSC
or F
Register
on Page
OSC
201
201
201
201
201
204
204
127
128
130
123
115
—
—
—
—
—
—
—
—
—
—
OSC
/4,
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