PIC18F45K22-I/P Microchip Technology Inc., PIC18F45K22-I/P Datasheet - Page 135
![no-image](/images/manufacturer_photos/0/4/440/microchip_technology_inc__sml.jpg)
PIC18F45K22-I/P
Manufacturer Part Number
PIC18F45K22-I/P
Description
40 PDIP .600in TUBE, 32KB, Flash, 1536bytes-RAM, 8-bit Family, nanoWatt XLP
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC18F45K22-IP.pdf
(496 pages)
Specifications of PIC18F45K22-I/P
A/d Inputs
28-Channel, 10-Bit
Comparators
2
Cpu Speed
16 MIPS
Eeprom Memory
256 Bytes
Input Output
35
Interface
I2C/SPI/UART/USART
Memory Type
Flash
Number Of Bits
8
Package Type
40-pin PDIP
Programmable Memory
32K Bytes
Ram Size
1.5K Bytes
Speed
64 MHz
Temperature Range
–40 to 125 °C
Timers
3-8-bit, 4-16-bit
Voltage, Range
1.8-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
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TABLE 10-1:
TABLE 10-2:
TABLE 10-3:
2010 Microchip Technology Inc.
RA6/CLKO/OSC2
RA7/CLKI/OSC1
Legend:
ANSELA
CM1CON0
CM2CON0
VREFCON1
VREFCON2
HLVDCON
PORTA
SLRCON
SRCON0
SSP1CON1
T0CON
TRISA
Legend: — = unimplemented locations, read as ‘0’. Shaded bits are not used for PORTA.
CONFIG1H
Legend: — = unimplemented locations, read as ‘0’. Shaded bits are not used for PORTA.
Name
Name
Pin Name
AN = Analog input or output; TTL = TTL compatible input; HV = High Voltage; OD = Open Drain; XTAL = Crystal;
CMOS = CMOS compatible input or output; ST = Schmitt Trigger input with CMOS levels; I
with I
VDIRMAG
TMR0ON
2
IESO
DACEN
TRISA7
Bit 7
C.
SRLEN
WCOL
C1ON
C2ON
PORTA I/O SUMMARY (CONTINUED)
CONFIGURATION REGISTERS ASSOCIATED WITH PORTA
Bit 7
RA7
—
—
—
REGISTERS ASSOCIATED WITH PORTA
Function
CLKO
OSC2
OSC1
CLKI
RA6
RA7
FCMEN
Bit 6
DACLPS DACOE
C1OUT
C2OUT
BGVST
SSPOV
TRISA6
T08BIT
Bit 6
RA6
Setting
—
—
—
TRIS
0
1
x
x
0
1
x
x
PRICLKEN PLLCFG
SRCLK<2:0>
ANSEL
Setting
SSPEN
TRISA5
ANSA5
Bit 5
IRVST
C1OE
C2OE
T0CS
Bit 5
RA5
—
—
—
—
—
—
—
—
—
—
Type
Pin
HLVDEN
O
O
O
O
TRISA4
Preliminary
C1POL
C2POL
I
I
I
I
SLRE
T0SE
Bit 4
RA4
CKP
Bit 4
—
—
Buffer
XTAL
XTAL
Type
DIG
TTL
DIG
DIG
TTL
AN
SRQEN
TRISA3
ANSA3
SLRD
C1SP
C2SP
Bit 3
PSA
Bit 3
RA3
LATA<6> data output; enabled in INTOSC modes when
CLKO is not enabled.
PORTA<6> data input; enabled in INTOSC modes when
CLKO is not enabled.
In RC mode, OSC2 pin outputs CLKOUT which has 1/4 the
frequency of OSC1 and denotes the instruction cycle rate.
Oscillator crystal output; connects to crystal or resonator in
Crystal Oscillator mode.
LATA<7> data output; disabled in external oscillator modes.
PORTA<7> data input; disabled in external oscillator
modes.
External clock source input; always associated with pin
function OSC1.
Oscillator crystal input or external clock source input ST
buffer when configured in RC mode; CMOS otherwise.
DACPSS<1:0>
PIC18(L)F2X/4XK22
DACR<4:0>
SRNQEN
TRISA2
ANSA2
SLRC
Bit 2
C1R
C2R
RA2
Bit 2
HLVDL<3:0>
SSPM<3:0>
FOSC<3:0>
T0PS<2:0>
Description
TRISA1
ANSA1
SLRB
SRPS
Bit 1
RA1
Bit 1
—
C1CH<1:0>
C2CH<1:0>
2
C
TM
DACNSS
=
TRISA0
ANSA0
SRPR
SLRA
Bit 0
Bit 0
Schmitt Trigger input
RA0
DS41412D-page 135
Register
on Page
Register
on Page
152
310
311
341
342
343
151
156
335
256
157
154
351
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