DSPIC30F6010A-30I/PF Microchip Technology Inc., DSPIC30F6010A-30I/PF Datasheet - Page 100

• Manufacturer Part Number: DSPIC30F6010A-30I/PF
• Description: 16 BIT MCU/DSP 80LD 30MIPS 144 KB FLASH
• Manufacturer: Microchip Technology Inc.
• Type: DSPr

Specifications of DSPIC30F6010A-30I/PF

• A/d Inputs: 16-Channels, 10-Bit
• Cpu Speed: 30 MIPS
• Eeprom Memory: 4K Bytes
• Input Output: 68
• Interface: CAN, I2C, SPI, UART/USART
• Ios: 68
• Memory Type: Flash
• Number Of Bits: 16
• Package Type: 80-pin TQFP
• Programmable Memory: 144K Bytes
• Ram Size: 8K Bytes
• Timers: 5-16-bit, 2-32-bit
• Voltage, Range: 2.5-5.5
• Lead Free Status / Rohs Status: RoHS Compliant part

dsPIC30F6010A/6015
15.6
In the Complementary mode of operation, each pair of
PWM outputs is obtained by a complementary PWM
signal. A dead time may be optionally inserted during
device switching, when both outputs are inactive for a
short period (Refer to Section 15.7 “Dead-Time
Generators”).
In Complementary mode, the duty cycle comparison
units are assigned to the PWM outputs as follows:
• PDC1 register controls PWM1H/PWM1L outputs
• PDC2 register controls PWM2H/PWM2L outputs
• PDC3 register controls PWM3H/PWM3L outputs
• PDC4 register controls PWM4H/PWM4L outputs
The Complementary mode is selected for each PWM
I/O pin pair by clearing the appropriate PMODx bit in the
PWMCON1 SFR. The PWM I/O pins are set to
Complementary mode by default upon a device Reset.
15.7
Dead-time generation may be provided when any of
the PWM I/O pin pairs are operating in the
Complementary Output mode. The PWM outputs use
Push-Pull drive circuits. Due to the inability of the
power output devices to switch instantaneously, some
amount of time must be provided between the turn off
event of one PWM output in a complementary pair and
the turn on event of the other transistor.
The PWM module allows two different dead times to be
programmed. These two dead times may be used in
one of two methods described below to increase user
flexibility:
• The PWM output signals can be optimized for
• The two dead times can be assigned to individual
15.7.1
Each complementary output pair for the PWM module
has a 6-bit down counter that is used to produce the
dead-time insertion. As shown in Figure 15-4, each
dead-time unit has a rising and falling edge detector
connected to the duty cycle comparison output.
DS70150B-page 98
different turn off times in the high side and low
side transistors in a complementary pair of tran-
sistors. The first dead time is inserted between
the turn off event of the lower transistor of the
complementary pair and the turn on event of the
upper transistor. The second dead time is
inserted between the turn off event of the upper
transistor and the turn on event of the lower tran-
sistor.
PWM I/O pin pairs. This Operating mode allows
the PWM module to drive different transistor/load
combinations with each complementary PWM I/O
pin pair.
Complementary PWM Operation
Dead-Time Generators
DEAD-TIME GENERATORS
15.7.2
The DTCON2 SFR contains control bits that allow the
dead times to be assigned to each of the complemen-
tary outputs. Table 15-1 summarizes the function of
each dead-time selection control bit.
TABLE 15-1:
15.7.3
The amount of dead time provided by each dead-time
unit is selected by specifying the input clock prescaler
value and a 6-bit unsigned value. The amount of dead
time provided by each unit may be set independently.
Four input clock prescaler selections have been pro-
vided to allow a suitable range of dead times, based on
the device operating frequency. The clock prescaler
option may be selected independently for each of the
two dead-time values. The dead-time clock prescaler
values are selected using the DTAPS<1:0> and
DTBPS<1:0> control bits in the DTCON1 SFR. One of
four clock prescaler options (T
T
After the prescaler values are selected, the dead time
for each unit is adjusted by loading two 6-bit unsigned
values into the DTCON1 SFR.
The dead-time unit prescalers are cleared on the
following events:
• On a load of the down timer due to a duty cycle
• On a write to the DTCON1 or DTCON2 registers.
• On any device Reset.
DTS1A
DTS1I
DTS2A
DTS2I
DTS3A
DTS3I
DTS4A
DTS4I
CY
comparison edge event.
Note:
Bit
) may be selected for each of the dead-time values.
Selects PWM1L/PWM1H active edge dead time.
Selects PWM1L/PWM1H inactive edge
dead time.
Selects PWM2L/PWM2H active edge dead time.
Selects PWM2L/PWM2H inactive edge
dead time.
Selects PWM3L/PWM3H active edge dead time.
Selects PWM3L/PWM3H inactive edge
dead time.
Selects PWM4L/PWM4H active edge dead time.
Selects PWM4L/PWM4H inactive edge
dead time.
DEAD-TIME ASSIGNMENT
DEAD-TIME RANGES
The user should not modify the DTCON1
or DTCON2 values while the PWM mod-
ule is operating (PTEN = 1). Unexpected
results may occur.
DEAD-TIME SELECTION BITS
© 2006 Microchip Technology Inc.
Function
CY
, 2 T
CY
, 4 T
CY
or 8