DP83849CVS/NOPB National Semiconductor, DP83849CVS/NOPB Datasheet - Page 72

• Manufacturer Part Number: DP83849CVS/NOPB
• Description: IC TXRX ETHERNET PHY DUAL 80TQFP
• Manufacturer: National Semiconductor
• Type: Transceiverr

Specifications of DP83849CVS/NOPB

• Number Of Drivers/receivers: 2/2
• Protocol: Ethernet
• Voltage - Supply: 3 V ~ 3.6 V
• Mounting Type: Surface Mount
• Package / Case: 80-TQFP, 80-VQFP
• Data Rate: 100Mbps
• Supply Voltage Range: 3V To 3.6V
• Logic Case Style: TQFP
• No. Of Pins: 80
• Operating Temperature Range: 0°C To +70°C
• Msl: MSL 3 - 168 Hours
• Filter Terminals: SMD
• Rohs Compliant: Yes
• Data Rate Max: 10Mbps
• For Use With: DP83849CVS-EVK - BOARD EVALUATION DP83849CVS
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: *DP83849CVS; *DP83849CVS/NOPB; DP83849CVS

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7.3.4 TDR Window Register (TDR_WIN), Page 2, address 17h
This register contains sample window control for the Time Domain Reflectometry (TDR) cable diagnostics. The two val-
ues contained in this register specify the beginning and end times for the window to monitor the response to the transmit-
ted pulse. Time values are in 8ns increments. This provides a method to search for multiple responses and also to
screen out the initial outgoing pulse.
7.3.5 TDR Peak Register (TDR_PEAK), Page 2, address 18h
This register contains the results of the TDR Peak Detection. Results are valid if the TDR_CTRL[11] is clear following
sending the TDR pulse.
7.3.6 TDR Threshold Register (TDR_THR), Page 2, address 19h
This register contains the results of the TDR Threshold Detection. Results are valid if the TDR_CTRL[11] is clear follow-
ing sending the TDR pulse
15:14
15:8
13:8
15:9
Bit
7:0
Bit
7:0
Bit
7:0
8
TDR_PEAK_TIME
TDR_THR_TIME
TDR_THR_MET
TDR_START
RESERVED
RESERVED
TDR_STOP
TDR_PEAK
Bit Name
Bit Name
Bit Name
.
Table 48. TDR Threshold Register (TDR_THR), address 19h
Table 46. TDR Window Register (TDR_WIN), address 17h
Table 47. TDR Peak Register (TDR_PEAK), address 18h
0xFF, RW
Default
Default
Default
0, RW
0, RO
0, RO
0, RO
0, RO
0, RO
0, RO
TDR Start Window:
Specifies start time for monitoring TDR response.
TDR Stop Window:
Specifies stop time for monitoring TDR response. The Stop Win-
dow should be set to a value greater than or equal to the Start Win-
dow.
RESERVED: Writes ignored, read as 0.
TDR Peak Value:
This register contains the peak value measured during the TDR
sample window. If Min Mode control (TDR_CTRL[7]) is 0, this con-
tains the maximum detected value. If Min Mode control is 1, this
contains the minimum detected value.
TDR Peak Time:
Specifies the time for the first occurrence of the peak value.
RESERVED: Writes ignored, read as 0.
TDR Threshold Met:
This bit indicates the TDR threshold was met during the sample
window. A value of 0 indicates the threshold was not met.
TDR Threshold Time:
Specifies the time for the first data that met the TDR threshold.
This field is only valid if the threshold was met.
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Description
Description
Description