DP83849CVS/NOPB National Semiconductor, DP83849CVS/NOPB Datasheet - Page 14

IC TXRX ETHERNET PHY DUAL 80TQFP

DP83849CVS/NOPB

Manufacturer Part Number
DP83849CVS/NOPB
Description
IC TXRX ETHERNET PHY DUAL 80TQFP
Manufacturer
National Semiconductor
Type
Transceiverr
Datasheets

Specifications of DP83849CVS/NOPB

Number Of Drivers/receivers
2/2
Protocol
Ethernet
Voltage - Supply
3 V ~ 3.6 V
Mounting Type
Surface Mount
Package / Case
80-TQFP, 80-VQFP
Data Rate
100Mbps
Supply Voltage Range
3V To 3.6V
Logic Case Style
TQFP
No. Of Pins
80
Operating Temperature Range
0°C To +70°C
Msl
MSL 3 - 168 Hours
Filter Terminals
SMD
Rohs Compliant
Yes
Data Rate Max
10Mbps
For Use With
DP83849CVS-EVK - BOARD EVALUATION DP83849CVS
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
*DP83849CVS
*DP83849CVS/NOPB
DP83849CVS

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
DP83849CVS/NOPB
Manufacturer:
NS
Quantity:
618
Part Number:
DP83849CVS/NOPB
Manufacturer:
Texas Instruments
Quantity:
10 000
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1.7 10 Mb/s and 100 Mb/s PMD Interface
LED_CFG_A
(CRS_A/CRS_DV_A)
LED_CFG_B
(CRS_B/CRS_DV_B)
MDIX_EN_A (RX_ER_A)
MDIX_EN_B (RX_ER_B)
ED_EN_A (RXD3_A)
ED_EN_B (RXD3_B)
CLK2MAC_DIS (RXD2_A)
TPTDM_A
TPTDP_A
TPTDM_B
TPTDP_B
TPRDM_A
TPRDP_A
TPRDM_B
TPRDP_B
Signal Name
Signal Name
S, O, PU
S, O, PU
S, O, PD
S, O, PD
Type
Type
I/O
I/O
Pin #
Pin #
26
27
36
35
23
24
39
38
61
60
53
1
2
9
8
LED CONFIGURATION: This strapping option determines the
mode of operation of the LED pins. Default is Mode 1. Mode 1 and
Mode 2 can be controlled via the strap option. All modes are con-
figurable via register access.
See Table 3 on page 20 for LED Mode Selection.
MDIX ENABLE: Default is to enable MDIX. This strapping option
disables Auto-MDIX. An external pull-down will disable Auto-
MDIX mode.
Energy Detect ENABLE: Default is to disable Energy Detect
mode. This strapping option enables Energy Detect mode for the
port. In Energy Detect mode, the device will initially be in a low-
power state until detecting activity on the wire. An external pull-up
will enable Energy Detect mode.
Clock to MAC Disable: This strapping option disables (floats) the
CLK2MAC pin. Default is to enable CLK2MAC output. An external
pullup will disable (float) the CLK2MAC pin. If the system does not
require the CLK2MAC signal, the CLK2MAC output should be dis-
abled via this strap option.
10BASE-T or 100BASE-TX Transmit Data
In 10BASE-T or 100BASE-TX: Differential common driver trans-
mit output (PMD Output Pair). These differential outputs are auto-
matically configured to either 10BASE-T or 100BASE-TX
signaling.
In Auto-MDIX mode of operation, this pair can be used as the Re-
ceive Input pair.
These pins require 3.3V bias for operation.
10BASE-T or 100BASE-TX Receive Data
In 10BASE-T or 100BASE-TX: Differential receive input (PMD In-
put Pair). These differential inputs are automatically configured to
accept either 100BASE-TX or 10BASE-T signaling.
In Auto-MDIX mode of operation, this pair can be used as the
Transmit Output pair.
These pins require 3.3V bias for operation.
14
Description
Description

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