DP83849CVS/NOPB National Semiconductor, DP83849CVS/NOPB Datasheet - Page 17

IC TXRX ETHERNET PHY DUAL 80TQFP

DP83849CVS/NOPB

Manufacturer Part Number
DP83849CVS/NOPB
Description
IC TXRX ETHERNET PHY DUAL 80TQFP
Manufacturer
National Semiconductor
Type
Transceiverr
Datasheets

Specifications of DP83849CVS/NOPB

Number Of Drivers/receivers
2/2
Protocol
Ethernet
Voltage - Supply
3 V ~ 3.6 V
Mounting Type
Surface Mount
Package / Case
80-TQFP, 80-VQFP
Data Rate
100Mbps
Supply Voltage Range
3V To 3.6V
Logic Case Style
TQFP
No. Of Pins
80
Operating Temperature Range
0°C To +70°C
Msl
MSL 3 - 168 Hours
Filter Terminals
SMD
Rohs Compliant
Yes
Data Rate Max
10Mbps
For Use With
DP83849CVS-EVK - BOARD EVALUATION DP83849CVS
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
*DP83849CVS
*DP83849CVS/NOPB
DP83849CVS

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DP83849CVS/NOPB
Manufacturer:
NS
Quantity:
618
Part Number:
DP83849CVS/NOPB
Manufacturer:
Texas Instruments
Quantity:
10 000
2.0 Configuration
This section includes information on the various configura-
tion options available with the DP83849C. The configura-
tion options described below include:
— Auto-Negotiation
— PHY Address and LEDs
— Half Duplex vs. Full Duplex
— Isolate mode
— Loopback mode
— BIST
2.1 Auto-Negotiation
The Auto-Negotiation function provides a mechanism for
exchanging configuration information between two ends of
a link segment and automatically selecting the highest per-
formance mode of operation supported by both devices.
Fast Link Pulse (FLP) Bursts provide the signalling used to
communicate Auto-Negotiation abilities between two
devices at each end of a link segment. For further detail
regarding Auto-Negotiation, refer to Clause 28 of the IEEE
802.3u specification. The DP83849C supports four differ-
ent Ethernet protocols (10 Mb/s Half Duplex, 10 Mb/s Full
Duplex, 100 Mb/s Half Duplex, and 100 Mb/s Full Duplex),
so the inclusion of Auto-Negotiation ensures that the high-
est performance protocol will be selected based on the
advertised ability of the Link Partner. The Auto-Negotiation
function within the DP83849C can be controlled either by
internal register access or by the use of the AN_EN, AN1
and AN0 pins.
2.1.1 Auto-Negotiation Pin Control
The state of AN_EN, AN0 and AN1 determines whether the
DP83849C is forced into a specific mode or Auto-Negotia-
tion will advertise a specific ability (or set of abilities) as
given in Table 1. These pins allow configuration options to
be selected without requiring internal register access.
The state of AN_EN, AN0 and AN1, upon power-up/reset,
determines the state of bits [8:5] of the ANAR register.
The Auto-Negotiation function selected at power-up or
reset can be changed at any time by writing to the Basic
Mode Control Register (BMCR) at address 00h.
17
2.1.2 Auto-Negotiation Register Control
When Auto-Negotiation is enabled, the DP83849C trans-
mits the abilities programmed into the Auto-Negotiation
Advertisement register (ANAR) at address 04h via FLP
Bursts. Any combination of 10 Mb/s, 100 Mb/s, Half-
Duplex, and Full Duplex modes may be selected.
Auto-Negotiation Priority Resolution:
— (1) 100BASE-TX Full Duplex (Highest Priority)
— (2) 100BASE-TX Half Duplex
— (3) 10BASE-T Full Duplex
— (4) 10BASE-T Half Duplex (Lowest Priority)
The Basic Mode Control Register (BMCR) at address 00h
provides control for enabling, disabling, and restarting the
Auto-Negotiation process. When Auto-Negotiation is dis-
abled, the Speed Selection bit in the BMCR controls
switching between 10 Mb/s or 100 Mb/s operation, and the
Duplex Mode bit controls switching between full duplex
operation and half duplex operation. The Speed Selection
and Duplex Mode bits have no effect on the mode of oper-
ation when the Auto-Negotiation Enable bit is set.
The Link Speed can be examined through the PHY Status
Register (PHYSTS) at address 10h after a Link is
achieved.
The Basic Mode Status Register (BMSR) indicates the set
of available abilities for technology types, Auto-Negotiation
ability, and Extended Register Capability. These bits are
permanently set to indicate the full functionality of the
DP83849C (only the 100BASE-T4 bit is not set since the
DP83849C does not support that function).
The BMSR also provides status on:
— Whether or not Auto-Negotiation is complete
— Whether or not the Link Partner is advertising that a re-
— Whether or not valid link has been established
— Support for Management Frame Preamble suppression
The Auto-Negotiation Advertisement Register (ANAR) indi-
cates the Auto-Negotiation abilities to be advertised by the
DP83849C. All available abilities are transmitted by
default, but any ability can be suppressed by writing to the
AN_EN
AN_EN
mote fault has occurred
0
0
0
0
1
1
1
1
Table 1. Auto-Negotiation Modes
AN1
AN1
0
0
1
1
0
0
1
1
AN0
AN0
0
1
0
1
0
1
0
1
10BASE-T, Half-Duplex
10BASE-T, Full-Duplex
100BASE-TX, Half-Duplex
100BASE-TX, Full-Duplex
10BASE-T, Half/Full-Duplex
100BASE-TX, Half/Full-Duplex
10BASE-T Half-Duplex
100BASE-TX, Half-Duplex
10BASE-T, Half/Full-Duplex
100BASE-TX, Half/Full-Duplex
Advertised Mo0e
Forced Mode
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