FIN1018K8X Fairchild Semiconductor, FIN1018K8X Datasheet

IC RECEIVER 3.3V HS LVDS 8US8

FIN1018K8X

Manufacturer Part Number
FIN1018K8X
Description
IC RECEIVER 3.3V HS LVDS 8US8
Manufacturer
Fairchild Semiconductor
Type
Receiverr
Datasheet

Specifications of FIN1018K8X

Number Of Drivers/receivers
0/1
Protocol
LVDS
Voltage - Supply
3 V ~ 3.6 V
Mounting Type
Surface Mount
Package / Case
US8, 8-VSSOP
Logic Family
FIN1018
Logic Type
Differential Receiver
Supply Voltage (max)
3.6 V
Supply Voltage (min)
3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Data Rate
400 Mbps
Interface
EIA/TIA-644
Minimum Operating Temperature
- 40 C
Number Of Lines (input / Output)
2 / 1 / 1
Supply Current
7 mA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
FIN1018K8XTR
FIN1018K8X_NL
FIN1018K8X_NLTR
FIN1018K8X_NLTR
© 2002 Fairchild Semiconductor Corporation
FIN1018M
FIN1018MX
FIN1018K8X
FIN1018
3.3V LVDS 1-Bit High Speed Differential Receiver
General Description
This single receiver is designed for high speed intercon-
nects utilizing Low Voltage Differential Signaling (LVDS)
technology. The receiver translates LVDS levels, with a typ-
ical differential input threshold of 100 mV, to LVTTL signal
levels. LVDS provides low EMI at ultra low power dissipa-
tion even at high frequencies. This device is ideal for high
speed transfer of clock or data.
The FIN1018 can be paired with its companion driver, the
FIN1017, or with any other LVDS driver.
Ordering Code:
Pin Descriptions
Function Table
H
L
Fail Safe
Order Number
LOW Logic Level
HIGH Logic Level
Open, Shorted, Terminated
Fail Safe Condition
R
Pin Name
H
IN
L
R
GND
R
R
V
NC
OUT
IN
IN
CC
Input
Package Number
MAB08A
R
M08A
M08A
H
IN
L
LVTTL Data Output
Non-inverting Driver Input
Inverting Driver Input
Power Supply
Ground
No Connect
Description
8-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
[TUBE]
8-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
[TAPE and REEL]
8-Lead US8, JEDEC MO-187, Variation CA 3.1mm Wide
[TAPE and REEL]
Outputs
R
OUT
H
H
L
DS500502
Features
Connection Diagrams
Greater than 400Mbs data rate
3.3V power supply operation
0.4ns maximum pulse skew
2.5ns maximum propagation delay
Low power dissipation
Power-Off protection
Fail safe protection for open-circuit, shorted and termi-
nated conditions
Meets or exceeds the TIA/EIA-644 LVDS standard
Flow-through pinout simplifies PCB layout
8-Lead SOIC and US-8 packages save space
Package Description
Pin Assignment for US-8 Package
8-Lead SOIC
TOP VIEW
March 2001
Revised April 2002
www.fairchildsemi.com

Related parts for FIN1018K8X

FIN1018K8X Summary of contents

Page 1

... Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow [TUBE] FIN1018MX M08A 8-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow [TAPE and REEL] FIN1018K8X MAB08A 8-Lead US8, JEDEC MO-187, Variation CA 3.1mm Wide [TAPE and REEL] Pin Descriptions Pin Name ...

Page 2

Absolute Maximum Ratings Supply Voltage ( Input Voltage ( Output Voltage (D ) OUT DC Output Current ( Storage Temperature Range (T ) STG Max Junction Temperature (T ) ...

Page 3

Note A: All input pulses have frequency 10MHz Note B: C includes all probe and fixture capacitances L FIGURE 1. Differential Receiver Voltage Definitions and Propagation Delay and Transition Time Test Circuit TABLE 1. Receiver Minimum ...

Page 4

Typical Performance Curves FIGURE 3. Output High Voltage vs. Power Supply Voltage FIGURE 5. Output Short Circuit Current vs. Power Supply Voltage FIGURE 7. Power Supply Current vs. Ambient Temperature www.fairchildsemi.com FIGURE 4. Output Low Voltage vs. ...

Page 5

Typical Performance Curves FIGURE 9. Differential Propagation Delay vs. Ambient Temperature FIGURE 11. Differential Skew vs. Ambient Temperature FIGURE 13. Differential Propagation Delay vs. Common-Mode Voltage (Continued) FIGURE 10. Differential Skew vs. Power Supply Voltage FIGURE 12. ...

Page 6

Typical Performance Curves FIGURE 15. Transition Time vs. Ambient Temperature FIGURE 17. Differential Propagation Delay vs. Load FIGURE 19. Transition Time vs. Load www.fairchildsemi.com (Continued) FIGURE 16. Differential Propagation Delay vs. Load FIGURE 18. Transition Time vs. ...

Page 7

Physical Dimensions inches (millimeters) unless otherwise noted 8-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow Package Number M08A 7 www.fairchildsemi.com ...

Page 8

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 8-Lead US8, JEDEC MO-187, Variation CA 3.1mm Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at ...

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