AD9954YSVZ Analog Devices Inc, AD9954YSVZ Datasheet - Page 2

• Manufacturer Part Number: AD9954YSVZ
• Description: IC DDS DAC 14BIT 1.8V 48-TQFP
• Manufacturer: Analog Devices Inc

Specifications of AD9954YSVZ

• Resolution (bits): 14 b
• Master Fclk: 400MHz
• Tuning Word Width (bits): 32 b
• Voltage - Supply: 1.71 V ~ 1.96 V
• Operating Temperature: -40°C ~ 105°C
• Mounting Type: Surface Mount
• Package / Case: 48-TQFP Exposed Pad, 48-eTQFP, 48-HTQFP, 48-VQFP
• Data Rate: 25Mbps
• Rf Ic Case Style: TQFP
• No. Of Pins: 48
• Supply Voltage Range: 1.71V To 1.89V, 3.135V To 3.465V
• Operating Temperature Range: -40°C To +105°C
• Msl: MSL 3 - 168 Hours
• Termination Type: SMD
• Rohs Compliant: Yes
• Filter Terminals: SMD
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AD9954/PCBZ - BOARD EVAL FOR 9954
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

AD9954
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
General Description ......................................................................... 1
Basic Block Diagram ........................................................................ 1
Revision History ............................................................................... 2
Functional Block Diagram .............................................................. 3
Electrical Specifications ................................................................... 4
Absolute Maximum Ratings ............................................................ 7
Pin Configuration and Function Descriptions ............................. 8
Typical Performance Characteristics ........................................... 10
Theory of Operation ...................................................................... 13
REVISION HISTORY
5/09—Rev. A to Rev. B
Changes to Figure 29 and Figure 30 ............................................. 24
Changes to Table 12 ........................................................................ 26
Changes to Figure 34 ...................................................................... 35
Updated Outline Dimensions ....................................................... 39
Changes to Ordering Guide .......................................................... 39
1/07—Rev. 0 to Rev. A
Changes to Layout .............................................................. Universal
Changes to Features, General Description, and Figure 1 ............ 1
Changes to Figure 2 .......................................................................... 3
Changes to Table 1 ............................................................................ 4
Changes to Table 4 ............................................................................ 8
Changes to Figure 5 to Figure 10 .................................................. 10
Changes to Figure 12 ...................................................................... 11
Changes to Figure 17 to Figure 18 Captions ............................... 12
Deleted Figure 19; Renumbered Sequentially ............................ 12
Added Table 5; Renumbered Sequentially .................................. 13
Changes to Component Block Section and Table 6 ................... 13
Changes to Figure 20 ...................................................................... 15
Changes to Modes of Operation Section and Table 8 ................ 16
Changes to Table 9 .......................................................................... 17
Changes to Synchronization; Register Updates (I/O UPDATE)
Section and Figure 24 ..................................................................... 21
Changes to Serial Port Operation Section ................................... 23
Explanation of Test Levels ........................................................... 7
ESD Caution .................................................................................. 7
Component Blocks ..................................................................... 13
Modes of Operation ................................................................... 16
Synchronization—Register Updates (I/O UPDATE) ............ 21
Serial Port Operation ................................................................. 23
Rev. B | Page 2 of 40
Detailed Programming Examples ................................................ 33
Suggested Application Circuits ..................................................... 35
Evaluation Board Schematics ........................................................ 36
Outline Dimensions ....................................................................... 39
Changes to Serial Interface Port Pin Description Section,
MSB/LSB Transfers Section, and RAM I/O Via Serial Port
Section .............................................................................................. 24
Inserted Figure 29 and Figure 30; Renumbered Sequentially .. 24
Changes to Instruction Byte Section, Register Maps and
Descriptions Section, and Table 12 .............................................. 25
Changes to Table 13 ....................................................................... 26
Changes to Table 14 ....................................................................... 28
Added Single-Tone Mode Section, Linear Sweep Mode Section,
Table 15, and RAM Mode Section ............................................... 33
Added, and Table 16 ....................................................................... 34
Inserted Figure 35 ........................................................................... 36
Inserted Figure 36 ........................................................................... 37
Inserted Figure 37 ........................................................................... 38
Updated Outline Dimensions ....................................................... 39
Changes to Ordering Guide .......................................................... 39
10/03—Revision 0: Initial Version
Serial Interface Port Pin Descriptions ..................................... 24
MSB/LSB Transfers .................................................................... 24
RAM I/O via Serial Port ............................................................ 24
Instruction Byte .......................................................................... 25
Register Maps and Descriptions ............................................... 25
Control Register Bit Descriptions ............................................ 29
Other Register Descriptions ..................................................... 31
Layout Considerations ............................................................... 32
Single-Tone Mode ...................................................................... 33
Linear Sweep Mode .................................................................... 33
RAM Mode .................................................................................. 33
Ordering Guide .......................................................................... 39