DP8522AV-25 National Semiconductor, DP8522AV-25 Datasheet - Page 45

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DP8522AV-25

Manufacturer Part Number
DP8522AV-25
Description
IC CTRLR 4M VRAM 25MHZ 68PLCC
Manufacturer
National Semiconductor
Datasheet

Specifications of DP8522AV-25

Controller Type
Video RAM Controller, Drivers
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
68-LCC (J-Lead)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Current - Supply
-
Voltage - Supply
-
Interface
-
Other names
*DP8522AV-25
12 0 Dual Accessing Functions (DP8522A)
12 2 PORT B WAIT STATE SUPPORT (DP8522A)
Advanced transfer acknowledge for Port B ATACKB is
used for wait state support for Port B This output will be
asserted when RAS for the Port B access is asserted as
shown in Figures 55 and 56 Once asserted this output will
stay asserted until AREQB is negated With external logic
ATACKB can be made to interface to any CPU’s wait input
as shown in Figure 57
A) Extend ATACK to
B) Extend ATACK to 1T after RAS goes low
T (
Clock) after RAS goes low
FIGURE 55 Non-Delayed Port B Access
FIGURE 56 Delayed Port B Access
TL F 9338 – A8
TL F 9338 – A9
45
C) Synchronize ATACKB to CPU B Clock This is useful if CPU B runs asyn-
chronous to the DP8522
12 3 COMMON PORT A AND PORT B DUAL PORT
FUNCTIONS
An input LOCK and an output GRANTB add additional
functionality to the dual port arbitration logic LOCK allows
Port A or Port B to lock out the other port from the VRAM
When a Port is locked out of the VRAM wait states will be
inserted into its access cycle until it is allowed to access
memory GRANTB is used to multiplex the input control sig-
nals and addresses to the DP8522A
12 3 1 GRANTB Output
The output GRANTB determines which port has current ac-
cess to the VRAM array GRANTB asserted signifies Port B
has access GRANTB negated signifies Port A has access
to the VRAM array
(Continued)
FIGURE 57 Modifying Wait Logic for Port B
TL F 9338 – B0
TL F 9338 – B1
TL F 9338 – B2

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