ISP1161ABD ST-Ericsson Inc, ISP1161ABD Datasheet - Page 42

• Manufacturer Part Number: ISP1161ABD
• Description: IC USB HOST/DEVICE CTRLR 64-LQFP
• Manufacturer: ST-Ericsson Inc

Specifications of ISP1161ABD

• Controller Type: USB 2.0 Controller
• Interface: Parallel
• Voltage - Supply: 3.3V, 5V
• Current - Supply: 47mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 64-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 568-1165; ISP1161ABD,157

Philips Semiconductors
9397 750 13962
Product data
Fig 36. Using an external OC detection circuit.
‘n’ represents the downstream port number (n = 1 or 2)
V BUS
downstream
connector
9.8.2 Using an external OC detection circuit
9.9.1 HC suspended state
USB
port
9.9 Suspend and wake-up
OC detect
V o
external
When V
internal OC detection circuit cannot be used. An external OC detection circuit must be
used instead. Regardless of the V
always be used. To use an external OC detection circuit, AnalogOCEnable, bit 10 of
the HcHardwareConfiguration register, must be logic 0. By default after reset, this bit
is already logic 0; therefore, the HCD does not need to clear this bit.
Figure 36
The HC can be put into suspended state by setting the HcControl register (01H -
read, 81H - write). See
OC
EN
V i
47 pF
(2×)
+ 5 V
CC
shows how to use an external OC detection circuit.
(pin 56) is connected to a 3.3 V instead of the 5 V power supply, the
22 Ω
22 Ω
+ 3.3 V or + 5 V
V CC
H_PSWn
Rev. 03 — 23 December 2004
H_OCn
H_DMn
H_DPn
Figure 23
Full-speed USB single-chip host and device controller
OC detect
regulator
≥
for the HC’s flow of USB state changes.
CC
15 kΩ
(2×)
value, an external OC detection circuit can
bit 12
Configuration
HcHardware
ATX
OC select
1
0 Reg
PSW
C/L
HC CORE
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
ISP1161A
SIE
Configuration
HcHardware
bit 10
ISP1161A
004aaa091
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