ISP1161ABD ST-Ericsson Inc, ISP1161ABD Datasheet - Page 26

• Manufacturer Part Number: ISP1161ABD
• Description: IC USB HOST/DEVICE CTRLR 64-LQFP
• Manufacturer: ST-Ericsson Inc

Specifications of ISP1161ABD

• Controller Type: USB 2.0 Controller
• Interface: Parallel
• Voltage - Supply: 3.3V, 5V
• Current - Supply: 47mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 64-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 568-1165; ISP1161ABD,157

Philips Semiconductors
9397 750 13962
Product data
Fig 24. ISP1161A HC USB transaction loop
Initialize
Reset
Entry
HC
USBOperational
HC state =
The USB traffic blocks are:
Prepare PTD data in µP System RAM
•
•
•
•
Reset
This includes hardware reset by pin RESET and software reset by the
HcSoftwareReset command (A9H). The reset function will clear all the HC’s
internal control registers to their reset status. After reset, the HCD must initialize
the ISP1161A USB HC by setting some registers.
Initialize HC
It includes:
See also
Entry
The normal entry point. The microprocessor returns to this point when there are
HC requests.
Need USB Traffic
USB devices need the HC to generate USB traffic when they have USB traffic
requests such as:
To generate USB traffic, the HCD must enter the USB transaction loop.
The communication between the HCD and the ISP1161A HC is in the form of
Philips Transfer Descriptor (PTD) data. The PTD data provides USB traffic
information about the commands, status, and USB data packets.
– Setting the physical size for the HC’s internal FIFO buffer RAM by setting the
– Setting the HcHardwareConfiguration register according to requirements
– Clearing interrupt events, if required
– Enabling interrupt events, if required
– Setting the HcFmInterval register (0DH - read, 8DH - write)
– Setting the HC’s Root Hub registers
– Setting the HcControl register to move the HC into USBOperational state
– Connecting to or disconnecting from the downstream ports
– Issuing the Resume signal to the HC
HcITLBufferLength register (2AH - read, AAH - write) and the
HcATLBufferLength register (2BH - read, ABH - write)
HC informs HCD of
USB traffic results
Section
USB traffic?
Need
Exit
Rev. 03 — 23 December 2004
no
9.5.
yes
Full-speed USB single-chip host and device controller
HC performs USB transactions
Prepare PTD data in
µP system RAM
via USB bus I/F
Transfer PTD data into
HC FIFO buffer RAM
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
HC interprets
PTD data
MGT948
ISP1161A
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