DS31412 Maxim Integrated Products, DS31412 Datasheet - Page 41

IC 12CH DS3/3 FRAMER 349-BGA

DS31412

Manufacturer Part Number
DS31412
Description
IC 12CH DS3/3 FRAMER 349-BGA
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of DS31412

Controller Type
DS3/E3 Framer
Interface
LIU
Voltage - Supply
3.135 V ~ 3.465 V
Current - Supply
960mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
349-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DS31412
Manufacturer:
Maxim Integrated
Quantity:
10 000
Part Number:
DS31412N
Manufacturer:
Maxim Integrated
Quantity:
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Table 7-E. DS3 Alarm Criteria
Table 7-F. E3 Alarm Criteria
CONDITION
CONDITION
ALARM/
ALARM/
T3IDLE
RUA1
RUA1
OOF
OOF
LOS
SEF
LOS
SEF
AIS
RAI
AIS
RAI
Alarm Indication Signal. Properly
framed 1010... pattern (starting
with 1 after each overhead bit),
all C bits set to 0
Unframed All-Ones
Loss-of-Signal
Out-of-Frame. Too many F bits
or M bits in error.
Severely Errored Frame
Remote Alarm Indication (Also
referred to as SEF/AIS in
Bellcore GR-820.)
X1 = X2 = 0 (active)
X1 = X2 = 1 (inactive)
DS3 Idle Signal. Properly framed
1100... pattern (starting with 11
after each overhead bit), the C
bits in M-subframe 3 set to 0
Alarm Indication Signal.
Unframed all ones.
Unframed All Ones
Loss of Signal
Severely Errored Frame
Out-of-Frame. Too many FAS
errors.
Remote Alarm Indication
Inactive: bit 11 of the frame = 0
Active: bit 11 of the frame = 1
FUNCTION
FUNCTION
In each 84-bit information field, the
properly aligned 1010... pattern is
detected with fewer than four bit
errors (out of 84 possible) for 1024
consecutive information bit fields
(1.95ms) and all C bits are majority
decoded to be 0 during this time.
Four or fewer 0s in two consecutive
4760-bit frames
192 consecutive 0s
Three or more F bits in error out of 16
consecutive, or two or more M bits in
error out of four consecutive
Three or more F bits in error out of 16
consecutive F bits
X1 = X2 = 0 for four consecutive M-
frames (426ms)
In each 84-bit information field, the
properly aligned 1100... pattern is
detected with fewer than four bit
errors (out of 84 possible) for 1024
consecutive information bit fields
(1.95ms), and the C bits in M-
subframe 3 are majority decoded to
be 0 during this time
Four or fewer 0s in two consecutive
1536-bit frames
Four or fewer 0s in two consecutive
1536-bit frames
192 consecutive 0s
Same as OOF
Four consecutive bad FAS
Bit 11 = 1 for four consecutive frames
(6144 bits, 179ms)
41 of 89
SET CRITERIA
SET CRITERIA
In each 84-bit information field,
the properly aligned 1010...
pattern is detected with four or
more bit errors (out of 84
possible) for 1024 consecutive
information bit fields (1.95ms)
Five or more 0s in two
consecutive 4760-bit frames
No EXZ events over a 192-bit
window that starts with the first 1
received
No errors in six consecutive sets
of four F bits followed by two
consecutive frames with no M
bits errors, X bits matching and
P bits matching
In sync (OOF = 0) and fewer
than three F bits in error out of
16 consecutive F bits
X1 = X2 = 1 for four consecutive
M-frames (426ms)
In each 84-bit information field,
the properly aligned 1100...
pattern is detected with four or
more bit errors (out of 84
possible) for 1024 consecutive
information bit fields (1.95ms)
Five or more 0s in two
consecutive 1536-bit frames
Five or more 0s in two
consecutive 1536-bit frames
No EXZ events over a 192-bit
window that starts with the first
1 received
Same as OOF
Three consecutive good FAS
Bit 11 = 0 for four consecutive
frames (6144 bits, 179ms)
CLEAR CRITERIA
CLEAR CRITERIA

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