DS21Q42T Maxim Integrated Products, DS21Q42T Datasheet - Page 69

IC FRAMER ENHANCED T1 4X 128TQFP

DS21Q42T

Manufacturer Part Number
DS21Q42T
Description
IC FRAMER ENHANCED T1 4X 128TQFP
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of DS21Q42T

Controller Type
T1 Framer
Interface
Parallel/Serial
Voltage - Supply
2.97 V ~ 3.63 V
Current - Supply
75mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
128-TQFP, 128-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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RDC1: RECEIVE HDLC DS0 CONTROL REGISTER 1 (Address = 90 Hex)
RDC2: RECEIVE HDLC DS0 CONTROL REGISTER 2 (Address = 91 Hex)
RDS0E
(MSB)
(MSB)
RDB8
SYMBOL
SYMBOL
RDS0M
RDS0E
RDB8
RDB7
RDB6
RDB5
RDB4
RDB3
RDB2
RDB1
RD4
RD3
RD2
RD1
RD0
-
RDB7
-
POSITION
POSITION
RDC1.7
RDC1.6
RDC1.5
RDC1.4
RDC1.3
RDC1.2
RDC1.1
RDC1.0
RDC2.7
RDC2.6
RDC2.5
RDC2.4
RDC2.3
RDC2.2
RDC2.1
RDC2.0
RDS0M
RDB6
NAME AND DESCRIPTION
HDLC DS0 Enable.
0 = use receive HDLC controller for the FDL.
1 = use receive HDLC controller for one or more DS0 channels.
Not Assigned. Should be set to 0.
DS0 Selection Mode.
0 = utilize the RD0 to RD4 bits to select which single DS0
channel to use.
1 = utilize the RCHBLK control registers to select which DS0
channels to use.
DS0 Channel Select Bit 4. MSB of the DS0 channel select.
DS0 Channel Select Bit 3.
DS0 Channel Select Bit 2.
DS0 Channel Select Bit 1.
DS0 Channel Select Bit 0. LSB of the DS0 channel select.
NAME AND DESCRIPTION
DS0 Bit 8 Suppress Enable. MSB of the DS0. Set to one to
stop this bit from being used.
DS0 Bit 7 Suppress Enable. Set to one to stop this bit from
being used.
DS0 Bit 6 Suppress Enable. Set to one to stop this bit from
being used.
DS0 Bit 5 Suppress Enable. Set to one to stop this bit from
being used.
DS0 Bit 4 Suppress Enable. Set to one to stop this bit from
being used.
DS0 Bit 3 Suppress Enable. Set to one to stop this bit from
being used.
DS0 Bit 2 Suppress Enable. Set to one to stop this bit from
being used.
DS0 Bit 1 Suppress Enable. LSB of the DS0. Set to one to
stop this bit from being used.
RDB5
RD4
69 of 116
RDB4
RD3
RDB3
RD2
RDB2
RD1
(LSB)
(LSB)
RDB1
RD0

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