IDT82V2108PXG IDT, Integrated Device Technology Inc, IDT82V2108PXG Datasheet - Page 182
IDT82V2108PXG
Manufacturer Part Number
IDT82V2108PXG
Description
IC FRAMER T1/J1/E1 8CH 128-PQFP
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet
1.IDT82V2108PX8.pdf
(292 pages)
Specifications of IDT82V2108PXG
Controller Type
T1/E1/J1 Framer
Interface
Parallel
Voltage - Supply
2.97 V ~ 3.63 V
Current - Supply
160mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
128-MQFP, 128-PQFP
Screening Level
Industrial
Mounting
Surface Mount
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
82V2108PXG
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Quantity
Price
Company:
Part Number:
IDT82V2108PXG
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
Part Number:
IDT82V2108PXG
Manufacturer:
IDT
Quantity:
20 000
Company:
Part Number:
IDT82V2108PXG8
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
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ISMFPE:
IDT82V2108
E1 FRMP Frame Pulse/Alarm/V5.2 Link ID Interrupt Enables (03EH, 0BEH, 13EH, 1BEH, 23EH, 2BEH, 33EH, 3BEH)
OOOFE:
RAICCRCE:
CFEBEE:
consecutive seconds.
consecutive seconds.
V52LINKE:
IFPE:
ICSMFPE:
ICMFPE:
Programming Information
Bit Name
Default
Bit No.
Type
= 0: Disable the interrupt on the INT pin when the OOOFI (b7, E1-03FH) is logic one.
= 1: Enable the interrupt on the INT pin when the OOOFI (b7, E1-03FH) is logic one.
= 0: Disable the interrupt on the INT pin when the Remote Alarm (logic 1 in A bit) and the FEBE (logic 0 in bit E1 or E2) have existed for 10 ms.
= 1: Enable the interrupt on the INT pin when the Remote Alarm (logic 1 in A bit) and the FEBE (logic 0 in bit E1 or E2) have existed for 10 ms.
= 0: Disable the interrupt on the INT pin when the FEBE (logic 0 in bit E1 or E2) has existed for more than 990 occasions in each second for 5
= 1: Enable the interrupt on the INT pin when the FEBE (logic 0 in bit E1 or E2) has existed for more than 990 occasions in each second for 5
= 0: Disable the interrupt on the INT pin when the V52LINKI is logic one.
= 1: Enable the interrupt on the INT pin when the V52LINKI (b4, E1-03FH) is logic one.
= 0: Disable the interrupt on the INT pin when the first bit of each Basic frame is received.
= 1: Enable the interrupt on the INT pin when the first bit of each Basic frame is received.
= 0: Disable the interrupt on the INT pin when the first bit of each CRC Sub Multi-Frame is received.
= 1: Enable the interrupt on the INT pin when the first bit of each CRC Sub Multi-Frame is received.
= 0: Disable the interrupt on the INT pin when the first bit of each CRC Multi-Frame is received.
= 1: Enable the interrupt on the INT pin when the first bit of each CRC Multi-Frame is received.
= 0: Disable the interrupt on the INT pin when the first bit of each Signaling Multi-Frame is received.
= 1: Enable the interrupt on the INT pin when the first bit of each Signaling Multi-Frame is received.
OOOFE
R/W
7
0
RAICCRCE
R/W
6
0
CFEBEE
R/W
5
0
V52LINKE
R/W
4
0
172
IFPE
R/W
3
0
ICSMFPE
R/W
2
0
T1 / E1 / J1 OCTAL FRAMER
ICMFPE
R/W
1
0
March 5, 2009
ISMFPE
R/W
0
0
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