TDA8023TT/C1,118 NXP Semiconductors, TDA8023TT/C1,118 Datasheet - Page 14

IC SMART CARD INTERFACE 28-TSSOP

TDA8023TT/C1,118

Manufacturer Part Number
TDA8023TT/C1,118
Description
IC SMART CARD INTERFACE 28-TSSOP
Manufacturer
NXP Semiconductors
Datasheet

Specifications of TDA8023TT/C1,118

Package / Case
28-TSSOP
Controller Type
Smart Card Interface
Interface
I²C
Voltage - Supply
2.7 V ~ 6.5 V
Current - Supply
200mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
935274975118
TDA8023TT-T
TDA8023TT-T
NXP Semiconductors
TDA8023_1
Product data sheet
When everything is satisfactorily present (voltage supply, card present, no hardware
problems) the system controller may initiate an activation sequence of a present card:
During the activation sequence, the answer from the card (ATR) is monitored and the
steps are the following:
The sequencer is clocked by
Thus
1. The internal oscillator changes to its high frequency (t
2. The DC-to-DC converter is started (t
3. V
4. The voltage on pin I/O rises to V
5. CLK is sent to the card and pin RST is enabled (t
1. If a start bit is detected on pin I/O during the first 200 CLK pulses, then it is simply
2. If a start bit is detected whilst pin RST = LOW (between 200 and 42100 CLK pulses or
3. If no start bit has been detected within 42100 CLK pulses, then pin RST is toggled to
4. If, again, a start bit is detected within 370 CLK pulses (200 + 170 or the value defined
5. If the card does not answer within 42100 new CLK pulses, then bit MUTE in the
6. If the card answers within the correct time window, then the CLK count is stopped and
Fig 5. Activation sequence
ignored, and the CLK count goes on.
the value written in C[15:0]), then the bits EARLY and MUTE are set in the Status
register. Pin RST will remain LOW. It is up to the software to decide whether to accept
the card or not.
HIGH (t
in D[7:0]), bit EARLY in the Status register is set.
Status register is set.
the system controller can send commands to the card.
CC
t
START
1
VUP
starts rising from 0 V to 5 V, 3 V or 1.8 V with a controlled rise time (t
=
RST
V
CLK
I/O
CC
0
5
).
t
s to
0
t
1
----- - t
64
T
,
2
t
2
Rev. 01 — 16 July 2007
=
t
1
+
t
act
-------------------
f
3T
------ -
osc int
2
64
,
t
3
CC
=
which leads to a time interval T = 25 s (typical).
, due to integrated 14 k pull-ups to V
t
t
3
1
1
).
+
7T
------ -
2
t
4
and
t
4
4
=
= t
t
act
1
0
, see
+
Low power IC card interface
).
4T
t
5
.
Figure
ATR
TDA8023
© NXP B.V. 2007. All rights reserved.
5).
001aag340
CC
2
).
(t
3
).
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