LAN9211-ABZJ SMSC, LAN9211-ABZJ Datasheet - Page 34

IC ETHERNET CTLR SGL CHIP 56-QFN

LAN9211-ABZJ

Manufacturer Part Number
LAN9211-ABZJ
Description
IC ETHERNET CTLR SGL CHIP 56-QFN
Manufacturer
SMSC
Type
Single Chip MAC and PHY Controllerr
Datasheet

Specifications of LAN9211-ABZJ

Controller Type
Ethernet Controller
Interface
Serial EEPROM
Voltage - Supply
3.3V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
56-QFN
Product
Ethernet Controllers
Number Of Transceivers
1
Standard Supported
IEEE 802.3 or IEEE 802.3u
Data Rate
10 Mbps or 100 Mbps
Supply Voltage (max)
5 V
Supply Voltage (min)
3.3 V
Supply Current (max)
86 mA
Maximum Operating Temperature
+ 70 C
Ethernet Connection Type
100BASE-TX or 10BASE-T
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
No. Of Ports
2
Ethernet Type
IEEE 802.3 / 802.3u
Interface Type
HBI
Supply Current
86mA
Supply Voltage Range
2.97V To 3.63V
Operating Temperature Range
0°C To +70°C
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Supply
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
638-1049-6

Available stocks

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Manufacturer
Quantity
Price
Part Number:
LAN9211-ABZJ
Manufacturer:
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Part Number:
LAN9211-ABZJ
Manufacturer:
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Quantity:
1 154
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LAN9211-ABZJ
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High-Performance Small Form Factor Single-Chip Ethernet Controller with HP Auto-MDIX Support
Datasheet
R X/TX D ata FIFO Port
R X/TX D ata FIFO D irect
C SR s and Status FIFO s
A ccess (addresses 00h to
A ccess
3C h)
(FIFO _SEL = 1)
FIFO Port Endian O rdering
D irect FIFO A ccess Endian
FSELEN D
FPO R TEN D
(H W _C FG [28])
(H W _C FG [29])
Logic
O rdering Logic
"W O R D SW A P"
W O R D _SW A P
Logic
D [15:0]
(H ost D ata B us)
Figure 3.2 LAN9211 Host Data Path Diagram
Data path operations for the various supported endianess and word swap configurations are illustrated
in
Figure
3.3.
Table 3.8, "Endian Ordering Logic Operation"
illustrates the byte ordering applied by the
endian logic for each type of host access. This figure and table assume an internal byte ordering of 3-
2-1-0, where ‘3’ is the most significant byte (data[31:24]) and ‘0’ is the least significant byte (data[7:0]).
34
Revision 2.7 (03-15-10)
SMSC LAN9211
DATASHEET

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