IDT821034DN IDT, Integrated Device Technology Inc, IDT821034DN Datasheet - Page 3

• Manufacturer Part Number: IDT821034DN
• Description: IC PCM CODEC QUAD MPI 52-PQFP
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: PCM Codec/Filterr

Specifications of IDT821034DN

• Data Interface: PCM Audio Interface
• Number Of Adcs / Dacs: 4 / 4
• Sigma Delta: No
• Voltage - Supply, Analog: 4.75 V ~ 5.25 V
• Voltage - Supply, Digital: 4.75 V ~ 5.25 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 52-MQFP, 52-PQFP
• Single Supply Voltage (typ): 5V
• Single Supply Voltage (min): 4.75V
• Single Supply Voltage (max): 5.25V
• Package Type: PQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 821034DN

IDT821034 QUAD PCM CODEC WITH PROGRAMMABLE GAIN
PIN DESCRIPTION (CONTINUED)
I/O3_1
I/O3_0
I/O2_1
I/O2_0
I/O1_1
I/O1_0
I/O0_1
I/O0_0
Name
MCLK
BCLK
CCLK
O1_4
O1_3
O1_2
O0_4
O0_3
O0_2
GND
VDD
CNF
TSX
CO
DX
DR
CS
FS
CI
Type
I/O
I/O
I/O
I/O
O
O
O
O
O
O
--
--
I
I
I
I
I
I
I
Pin Number
35
34
33
30
29
28
12
13
32
31
27
26
14
15
16
17
18
19
20
21
22
23
24
25
36
7
8
SLIC Signaling Output for Channel 1.
SLIC Signaling Output for Channel 0.
SLIC Signaling I/O for Channel 3.
SLIC Signaling I/O for Channel 2.
SLIC Signaling I/O for Channel 1.
SLIC Signaling I/O for Channel 0.
Transmit PCM Data Output.
PCM data is shifted out of DX on rising edges of BCLK.
+5 V Digital Power Supply.
All power supply pins should be connected to the power plane of the circuit board.
Receive PCM Data Input.
PCM data is shifted into DR on falling edges of BCLK.
Time Slot Indicator Output, Open Drain
This pin pulses low during the active time slot of each channel. A low level on this pin indicates active DX
output.
Frame Synchronization.
The FS pulse serves as the reference to time slots. The width of the FS pulse should be at least one BCLK
cycle.
Master Clock.
Master Clock provides the clock for DSP. It can be 2.048 MHz, 4.096 MHz or 8.192 MHz. It must be
synchronous to FS.
Bit Clock.
Bit Clock shifts out PCM data on DX pin and shifts in PCM data on DR pin. The clock can vary from 512 kHz
to 8.192 MHz at 64 kHz increment, depending on the time slot requirement of the system.
Serial Control Interface Clock.
This is the clock for Serial Control Interface. It can be up to 8.192 MHz.
Serial Control Interface Data Tri-State Output.
This pin is used to monitor SLIC working status. It is in high impedance state when CS is high.
Serial Control Interface Data Input.
Data input on this pin can control both CODEC and SLIC.
Chip Select.
A low level on this pin enables the Serial Control Interface.
Ground.
All ground pins should be connected to the ground plane of the circuit board.
Capacitor For Noise Filter.
This pin should be connected to GNDA via a 0.1 F capacitor.
3
Description
INDUSTRIAL TEMPERATURE RANGE