UDA1355H/N2,557 NXP Semiconductors, UDA1355H/N2,557 Datasheet - Page 37

• Manufacturer Part Number: UDA1355H/N2,557
• Description: IC CODEC STER/SUDIO SPDIF 44QFP
• Manufacturer: NXP Semiconductors
• Type: Stereo Audior

Specifications of UDA1355H/N2,557

• Data Interface: I²C, Serial
• Resolution (bits): 24 b
• Number Of Adcs / Dacs: 2 / 2
• Sigma Delta: No
• S/n Ratio, Adcs / Dacs (db) Typ: 97 / 98
• Voltage - Supply, Analog: 2.7 V ~ 5.5 V
• Voltage - Supply, Digital: 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 44-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 935271552557

NXP Semiconductors
11.9
The write cycle is used to write groups of two bytes to the
internal registers for the digital sound feature control and
system setting. It is also possible to read these locations
for chip status information.
The I
Table 22. The write cycle is used to write the data to the
internal registers. The device and register addresses are
one byte each, the setting data is always a couple of two
bytes.
The format of the write cycle is as follows:
1. The microcontroller starts with a start condition (S).
2. The first byte (8 bits) contains the device address
3. This is followed by an acknowledge (A) from the
Table 22 Master transmitter writes to the UDA1355H registers in the I
Note
1. Auto increment of register address.
2003 Apr 10
handbook, full pagewidth
S
Stereo audio codec with SPDIF interface
0011010 and a logic 0 (write) for the R/W bit.
UDA1355H.
2
ADDRESS
C-bus configuration for a write cycle is shown in
Write cycle
DEVICE
0011010
BY TRANSMITTER
DATA OUTPUT
DATA OUTPUT
BY RECEIVER
R/W
0
SCL FROM
MASTER
A
REGISTER
ADDRESS
ADDR
condition
START
S
Fig.19 Acknowledge on the I
A
acknowledge from UDA1355H
MS1
1
DATA 1
A
37
LS1
4. After this the microcontroller writes the 8-bit register
5. The UDA1355H acknowledges this register address
6. The microcontroller sends two bytes data with the
7. If repeated groups of two bytes are transmitted, then
8. Finally, the UDA1355H frees the I
2
address (ADDR) where the writing of the register
content of the UDA1355H must start.
(A).
Most Significant (MS) byte first and then the Least
Significant (LS) byte. After each byte an acknowledge
is followed from the UDA1355H.
the register address is auto incremented. After each
byte an acknowledge is followed from the
microcontroller.
microcontroller can generate a stop condition (P).
A
2
2
C mode.
C-bus.
....
DATA 2
not acknowledge
acknowledge
A
8
.....
(1)
acknowledgement
clock pulse for
A
9
MSn
Preliminary specification
MBC602
DATA n
2
UDA1355H
C-bus and the
A
LSn
(1)
A P