UDA1355H/N2,557 NXP Semiconductors, UDA1355H/N2,557 Datasheet - Page 17

• Manufacturer Part Number: UDA1355H/N2,557
• Description: IC CODEC STER/SUDIO SPDIF 44QFP
• Manufacturer: NXP Semiconductors
• Type: Stereo Audior

Specifications of UDA1355H/N2,557

• Data Interface: I²C, Serial
• Resolution (bits): 24 b
• Number Of Adcs / Dacs: 2 / 2
• Sigma Delta: No
• S/n Ratio, Adcs / Dacs (db) Typ: 97 / 98
• Voltage - Supply, Analog: 2.7 V ~ 5.5 V
• Voltage - Supply, Digital: 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 44-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 935271552557

NXP Semiconductors
7.7.4
The UDA1355H is equipped with a digital silence detector.
This detects whether a certain amount of consecutive
samples are 0. The number of samples can be set with
bits SD_VALUE[1:0] to 3200, 4800, 9600 or 19600
samples.
The digital silence detection status can be read via the
microcontroller interface.
7.7.5
The noise shaper shifts in-band quantization noise to
frequencies above the audio band. The noise shaper
output is converted into an analog signal using a Filter
Stream Digital-to-Analog Converter (FSDAC). This noise
shaping technique enables high signal-to-noise ratios to
be achieved.
The UDA1355H is equipped with two noise shapers:
• A third-order noise shaper operating at 128fs. Which is
• A fifth-order noise shaper operating at 64f
When the noise shaper changes, the clock to the FSDAC
changes and the filter characteristic of the FSDAC also
changes. The effect on the roll of is compensated by
selecting the filter matching speed and order of the noise
shaper.
2003 Apr 10
handbook, full pagewidth
used at low sampling frequencies (8 to 16 kHz) to
prevent noise shaper noise shifting into the audio band
for the fifth-order noise shaper
used at high sampling frequencies (from 32 kHz
upwards).
Stereo audio codec with SPDIF interface
D
N
channel 2
channel 1
IGITAL SILENCE DETECTOR
OISE SHAPER
DE-EMPHASIS
DE-EMPHASIS
(DAC)
VOLUME
VOLUME
MUTE
MUTE
AND
AND
Fig.9 Digital mixer (DAC) inside the interpolator DSP.
sound features
mixing before
s
. Which is
BASS-BOOST
TREBLE
AND
1f
sound features
17
s
mixing after
7.7.6
The FSDAC is a semi digital reconstruction filter that
converts the 1-bit data bitstream of the noise shaper to an
analog output voltage. The filter coefficients are
implemented as current sources and are summed at virtual
ground of the operational amplifier output. In this way, very
high signal-to-noise performance and low clock jitter
sensitivity are achieved. A post filter is not needed due to
the inherent filter function of the FSDAC. On-chip
amplifiers convert the FSDAC output current to an output
voltage signal capable of driving a line output. The output
voltage of the FSDAC scales proportionally with the supply
voltage.
7.7.7
The DAC and interpolator can be muted by setting
pin MUTE to a HIGH level. The output signal is muted to
zero via a cosine roll-off curve and the DAC is powered
down. When pin MUTE is at LOW level the signal rise
follows the same cosine curve.
To prevent plops in case of changing inputs, clock to the
DAC or application modes, a special mute circuit for the
DAC is implemented (see Table 8).
In all application modes in which the DAC is active the
DAC can be muted by pin MUTE. The microcontroller
mute bits and pin MUTE act as an OR function.
output of mixer
L3/I
F
DAC
ILTER STREAM
2
C bit
MUTE
FILTER
INT.
UDA1355H
2f s
DAC
VOLUME
MASTER
MUTE
AND
Preliminary specification
UDA1355H
to
interpolation
filter and
DAC output
MGU834