CS4205-KQZ Cirrus Logic Inc, CS4205-KQZ Datasheet - Page 27

• Manufacturer Part Number: CS4205-KQZ
• Description: IC CODEC AC97 I2S 48-LQFP
• Manufacturer: Cirrus Logic Inc
• Type: Audio Codec '97r

Specifications of CS4205-KQZ

• Package / Case: 48-LQFP
• Data Interface: Serial
• Resolution (bits): 18, 20 b
• Number Of Adcs / Dacs: 1 / 2
• Sigma Delta: Yes
• Dynamic Range, Adcs / Dacs (db) Typ: 90 / 90
• Voltage - Supply, Analog: 4.75 V ~ 5.25 V
• Voltage - Supply, Digital: 4.75 V ~ 5.25 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Number Of Adc Inputs: 8
• Number Of Dac Outputs: 3
• Conversion Rate: 48 KSPs
• Interface Type: Serial (5-Wire)
• Resolution: 18 bit, 20 bit
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• Number Of Channels: 1 ADC, 1 DAC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 598-1182

5.1
SE[4:0]
ID8
ID7
ID5
ID3
ID2
ID0
Default
5.2
Mute
ML[5:0]
MR[5:0]
Default
DS489PP4
Any write to this register causes a Register Reset of the audio control (Index 00h - 3Ah) and Cirrus Logic defined
(Index 5Ah - 7Ah) registers. A read from this register returns configuration information about the CS4205.
Mute
D15
D15
0
Reset Register (Index 00h)
Master Volume Register (Index 02h)
D14
SE4
D14
0
ML5
D13
SE3
D13
SRS 3D Stereo Enhancement. SE[4:0] = 01001, indicating this feature is present.
18-bit ADC Resolution. The ID8 bit is ‘set’, indicating this feature is present.
20-bit DAC resolution. The ID7 bit is ‘set’, indicating this feature is present.
Loudness. The ID5 bit is ‘set’, indicating this feature is present.
Simulated Stereo. The ID3 bit is ‘set’, indicating this feature is present.
Bass & Treble. The ID2 bit is ‘set’, indicating this feature is present.
Dedicated Mic PCM in Channel. The ID0 bit is ‘set’, indicating this feature is present.
25ADh. The data in this register is read-only data.
Master Mute. Setting this bit mutes the LINE_OUT_L/R output signals.
Master Volume Left. These bits control the left master output volume. Each step corresponds
to 1.5 dB gain adjustment, with a total available range from 0 dB to -46.5 dB attenuation. Set-
ting the ML5 bit sets the left channel attenuation to -46.5 dB by forcing ML[4:0] to a ‘1’ state.
ML[5:0] will read back 011111 when ML5 has been ‘set’. See Table 4 for further details.
Master Volume Right. These bits control the right master output volume. Each step corre-
sponds to 1.5 dB gain adjustment, with a total available range from 0 dB to -46.5 dB attenu-
ation. Setting the MR5 bit sets the right channel attenuation to -46.5 dB by forcing MR[4:0] to
a ‘1’ state. MR[5:0] will read back 011111 when MR5 has been ‘set’. See Table 4 for further
details.
8000h. This value corresponds to 0 dB attenuation and Mute ‘set’.
SE2
ML4
D12
D12
SE1
ML3
D11
D11
Table 4. Analog Mixer Output Attenuation
ML2
D10
SE0
D10
Mx5 - Mx0
000000
000001
100000
011111
111111
Write
…
...
ML1
D9
D9
0
ML0
Mx5 - Mx0
ID8
D8
D8
000000
000001
011111
011111
011111
Read
…
...
ID7
D7
D7
0
-46.5 dB
-46.5 dB
-46.5 dB
-1.5 dB
D6
D6
Level
0
0
Gain
0 dB
...
...
MR5
ID5
D5
D5
MR4
D4
D4
0
MR3
ID3
D3
D3
MR2
ID2
D2
D2
CS4205
MR1
D1
D1
0
MR0
ID0
D0
D0
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