CS42324-CQZ Cirrus Logic Inc, CS42324-CQZ Datasheet - Page 46

IC CODEC STEREO AUDIO 48LQFP

CS42324-CQZ

Manufacturer Part Number
CS42324-CQZ
Description
IC CODEC STEREO AUDIO 48LQFP
Manufacturer
Cirrus Logic Inc
Type
Audio Codecr
Datasheet

Specifications of CS42324-CQZ

Package / Case
48-LQFP
Data Interface
Serial
Resolution (bits)
24 b
Number Of Adcs / Dacs
1 / 2
Sigma Delta
Yes
Dynamic Range, Adcs / Dacs (db) Typ
95 / 100
Voltage - Supply, Analog
3.13 V ~ 3.47 V
Voltage - Supply, Digital
3.13 V ~ 3.47 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Number Of Adc Inputs
1
Number Of Dac Outputs
2
Conversion Rate
96 KSPS
Interface Type
Serial (I2S, SPI)
Resolution
24 bit
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Number Of Channels
1 ADC/2 DAC
Supply Current
10 mA to 24 mA
Thd Plus Noise
- 88 dB ADC / - 90 dB DAC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
598-1498 - BOARD EVAL FOR CS42324 CODEC
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
598-1602

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CS42324-CQZ
Manufacturer:
TI
Quantity:
2 435
Part Number:
CS42324-CQZ
Manufacturer:
Cirrus Logic Inc
Quantity:
10 000
46
6. REGISTER DESCRIPTION
All registers are read/write except where otherwise noted. See the following bit definition tables for bit assignment
information. The default state of each bit after release of reset is listed in the shaded row of each bit description
table. When writing to registers containing “Reserved” bits, all bits marked as “Reserved” must maintain their default
values.
6.1
6.1.1
6.1.2
6.2
6.2.1
6.2.2
DEVICE3
Reserved
7
7
Device I.D. and Revision Register (Address 00h) (Read Only)
Mute Control (Address 01h)
Device I.D. (Read Only)
I.D. code for the CS42324.
Chip Revision (Read Only)
CS42324 revision level.
System MCLK Source
This bit selects which MCLK pin provides the clock for internal state machines. It must always be set to
whichever clock is currently active.
Mute DAC2 Left-Channel
When set, this bit engages internal mute circuit on DAC2 output.
0110
000
001
0
1
0
1
DAC2_MuteL
DEVICE[3:0]
SYS_MCLK
REV[3:0]
SYS_MCLK
DEVICE2
6
6
CS42324
A1
B0
MCLK1
MCLK2
Un-muted
Muted
DEVICE1
DAC2_
MuteL
5
5
DEVICE0
DAC2_
MuteR
4
4
Mute status of DAC2 Left-channel
System MCLK source
DAC1_
MuteL
REV3
Revision Level
3
3
Device
DAC1_
MuteR
REV2
2
2
MuteL
REV1
ADC_
1
1
CS42324
MuteR
DS721A6
REV0
ADC_
0
0

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