CS42324-CQZ Cirrus Logic Inc, CS42324-CQZ Datasheet - Page 37

• Manufacturer Part Number: CS42324-CQZ
• Description: IC CODEC STEREO AUDIO 48LQFP
• Manufacturer: Cirrus Logic Inc
• Type: Audio Codecr

Specifications of CS42324-CQZ

• Package / Case: 48-LQFP
• Data Interface: Serial
• Resolution (bits): 24 b
• Number Of Adcs / Dacs: 1 / 2
• Sigma Delta: Yes
• Dynamic Range, Adcs / Dacs (db) Typ: 95 / 100
• Voltage - Supply, Analog: 3.13 V ~ 3.47 V
• Voltage - Supply, Digital: 3.13 V ~ 3.47 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Number Of Adc Inputs: 1
• Number Of Dac Outputs: 2
• Conversion Rate: 96 KSPS
• Interface Type: Serial (I2S, SPI)
• Resolution: 24 bit
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Number Of Channels: 1 ADC/2 DAC
• Supply Current: 10 mA to 24 mA
• Thd Plus Noise: - 88 dB ADC / - 90 dB DAC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1498 - BOARD EVAL FOR CS42324 CODEC
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 598-1602

DS721A6
4.4.8
4.5
4.5.1
4.5.2
Initialization
The initialization and Power-Down sequence flow chart is shown in
ters a Power-Down state upon initial power-up. The interpolation and decimation filters, delta-sigma modu-
lators and software registers are reset. The internal voltage reference, multi-bit DACs and ADC, and on-chip
amplifiers are powered down.
When changing the serial port clock ratio or sample rate, it is recommended that zero data (or near zero
data) be present on SDIN for at least 10 LRCK samples before the change is made. During the clocking
change, the DAC outputs will always be in a zero data state. If non-zero serial audio input is present at
the time of switching, a slight click or pop may be heard as the DAC output automatically goes to it’s zero
data state.
4.4.7.3
Mute Control
The MUTECx pins become active during power-up initialization, reset, software/hardware muting, and
power-down mode (PDN=1). The MUTECx pins are intended to be used as control for an external mute
circuit in order to add off-chip mute capability.
Use of the Mute Control function is not mandatory but recommended for designs requiring the absolute
minimum in extraneous clicks and pops. Also, use of the Mute Control function can enable the system
designer to achieve idle channel noise/signal-to-noise ratios which are only limited by the external mute
circuit. The MUTECx pins are active-low CMOS drivers.
Determining Hardware or Software Mode
The device will remain in the Power-Down state until the RST pin is brought high. If there is a pull-up on
SDOUT, or SDOUT is held high by any other means at the time RST pin is brought high, the device will
enter Hardware mode and begin powering up immediately. If no pull-up is present, or SDOUT is held low
by any other means at the time RST pin is brought high, the device will enter software mode.
Hardware Mode Start-Up
When the pull-up on SDOUT is present Hardware Mode is selected. Once hardware mode is selected,
the hardware mode configuration pins are used to set up the device and power-up will occur following the
HW startup path as shown in
found in
ware mode, many modes of operation are not available.
Only MCLK1 needs to be applied. Once the appropriate MCLK1 is valid and RST is high, the quiescent
voltage, VCMADC and VCMBUF, and the internal voltage references, FILT+ and VCM_ADC, will begin
powering up to normal operation. During this voltage reference ramp delay, both SDOUT and the
AOUTxA/AOUTxB outputs will be automatically muted. Once LRCKx is valid, MCLKx occurrences are
counted over one LRCKx period to determine the MCLKx/LRCKx frequency ratio and normal operation
begins.
It is recommended that RST be activated if the analog or digital supplies drop below the recommended
operating condition to prevent power-glitch-related issues.
Section 4.6.1 "Hardware Mode" on page
Serial Interface Clock Changes
Figure 19 on page
40. Because of the limited configuration abilities in Hard-
39. The modes of configuration for this mode can be
Figure 19 on page
39. The CODEC en-
CS42324
37