CS42324-CQZ Cirrus Logic Inc, CS42324-CQZ Datasheet - Page 39

• Manufacturer Part Number: CS42324-CQZ
• Description: IC CODEC STEREO AUDIO 48LQFP
• Manufacturer: Cirrus Logic Inc
• Type: Audio Codecr

Specifications of CS42324-CQZ

• Package / Case: 48-LQFP
• Data Interface: Serial
• Resolution (bits): 24 b
• Number Of Adcs / Dacs: 1 / 2
• Sigma Delta: Yes
• Dynamic Range, Adcs / Dacs (db) Typ: 95 / 100
• Voltage - Supply, Analog: 3.13 V ~ 3.47 V
• Voltage - Supply, Digital: 3.13 V ~ 3.47 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Number Of Adc Inputs: 1
• Number Of Dac Outputs: 2
• Conversion Rate: 96 KSPS
• Interface Type: Serial (I2S, SPI)
• Resolution: 24 bit
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Number Of Channels: 1 ADC/2 DAC
• Supply Current: 10 mA to 24 mA
• Thd Plus Noise: - 88 dB ADC / - 90 dB DAC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1498 - BOARD EVAL FOR CS42324 CODEC
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 598-1602

DS721A6
4.5.4
1. Audible pops.
Power Off Transition
Initialization Flow Chart
1. Pops suppressed.
Reset Transition
ERROR: Power removed
Hardware Mode
Minimal feature
set support.
Yes
1. No audio signal generated.
2. Control Port Registers reset
to default.
Off Mode (Power Applied)
1. No audio signal
generated.
Pull-up on SDOUT?
Power Applied
RST = Low?
No Power
Figure 19. Initialization Flow Chart
No
ERROR: MCLKx/LRCKx ratio change
Registers setup to
desired settings.
Software Mode
Yes
No
RST = Low
Audio signal generated per control port or stand-
1. AOUTx bias = last audio sample.
2. DAC Modulators stop operation.
3. Audible pops.
1. VCMADC/VCMDAC
Charged to quiescent voltage.
2. Filt+/VBIAS Charged.
No
ERROR: MCLKx removed
Analog Output Freeze
1. LRCKx valid.
2. SCLKx valid.
3. Audio samples
processed.
Sub-Clocks Applied
Normal Operation
MCLKx cycle delay
MCLKx/LRCKx
PDN bit = '1'b?
Digital/Analog
Output Muted
alone settings.
Charge Caps
Initialization
2048 internal
20 ms delay
DAC / ADC
Ratio?
Valid
No
Yes
Yes
1. No audio signal generated.
2. Control Port Registers retain
settings.
3. Update Control Port Registers
as Required.
1. Pops suppressed.
20
Standby Mode
PDN bit set to '1'b
(software mode only)
μ
Transition
Stand-By
CS42324
s delay (DAC
only)
39