CS4270-DZZ Cirrus Logic Inc, CS4270-DZZ Datasheet - Page 21

IC CODEC 24BIT 105DB 24TSSOP

CS4270-DZZ

Manufacturer Part Number
CS4270-DZZ
Description
IC CODEC 24BIT 105DB 24TSSOP
Manufacturer
Cirrus Logic Inc
Type
Stereo Audior
Datasheets

Specifications of CS4270-DZZ

Data Interface
Serial
Resolution (bits)
24 b
Number Of Adcs / Dacs
2 / 2
Sigma Delta
Yes
Dynamic Range, Adcs / Dacs (db) Typ
105 / 105
Voltage - Supply, Analog
3.1 V ~ 5.25 V
Voltage - Supply, Digital
3.1 V ~ 5.25 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
24-TSSOP
Audio Codec Type
Stereo
No. Of Adcs
1
No. Of Dacs
1
No. Of Input Channels
3
No. Of Output Channels
3
Adc / Dac Resolution
24bit
Sampling Rate
216kSPS
Ic Interface Type
I2C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
598-1002 - BOARD EVAL FOR CS4270 CODEC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
598-1622

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
CS4270-DZZ
Manufacturer:
CIRRUS
Quantity:
9
Part Number:
CS4270-DZZ
Manufacturer:
CIRRUS
Quantity:
62
DS686F1
5.1.7
5.1.8
5.2
5.2.1
5.2.2
Serial Control Port Mode
• In Master Mode, LRCK and SCLK are outputs and are synchronously generated by the device. LRCK
• In Slave Mode, LRCK and SCLK are inputs, requiring external generation that is synchronous to MCLK.
Mode Selection & De-Emphasis
Access to Serial Audio Interface Format
Access to Serial Control Port Mode
Access to Master/Slave Mode
could result in recording a DC level, possibly yielding "clicks" when switching between devices in a multi-
channel system. In Stand-Alone Mode, the high-pass filter is always active and continuously subtracts a
measure of the DC offset from the output of the decimation filter.
The sample rate, Fs, can be adjusted from 4 kHz to 216 kHz and De-emphasis, optimized for 44.1 kHz,
is available in Single-Speed Mode. In Stand-Alone Master Mode, the CS4270 must be set to the proper
mode via the mode pins, M1 and M0. In Slave Mode, the CS4270 auto-detects Speed Mode and the M0
pin becomes De-emphasis select. Stand-alone definitions of the mode pins in Master Mode are shown in
Table
Either I²S or Left-Justified serial audio data format may be selected in Stand-Alone Mode. To use the I
format, tie the I²S/LJ pin to VLC during power up. To use LJ format, tie I²S/LJ to DGND during power up.
Reliable power-up is achieved by keeping the device in reset until the power supplies, clocks, and config-
uration pins are stable. It is also recommended that RST be asserted if the analog or digital supplies drop
below the minimum specified operating voltages to prevent power glitch related issues.
After RST is released, the device is put into Serial Control Port Mode by setting the power down bit
through a SPI or I²C transaction, as described in
If the transaction is not completed within 1,045 sample periods after the release of reset, the device enters
Stand-Alone Mode.
If the first Serial Control Port transaction is ongoing while the device is executing pop control, there is a
chance of generating audio transients. The details of the duration of pop control is outlined in
“Power-Up” on page
When the device is Serial Control Port Mode, it can be programmed as desired. After clearing the power-
down bit, desired device functioning can start.
The CS4270 supports operation in either Master Mode or Slave Mode.
Mode 1
is equal to Fs and SCLK is equal to 64x Fs.
It is recommended that SCLK be 48x or 64x Fs to maximize system performance.
0
0
1
1
5.
Mode 0
0
1
0
1
24.
Table 5. CS4270 Stand-Alone Mode Control
Double-Speed
Single-Speed
Single-Speed
Quad-Speed
Mode
Section 6.1
Sample Rate (Fs)
100 kHz - 216 kHz
50 kHz - 108 kHz
4 kHz - 54 kHz
4 kHz - 54 kHz
and
Section
6.2.
De-Emphasis
44.1 kHz
Off
Off
Off
Section 5.3.1
CS4270
2
21
S

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