MPC8560PX833LC Freescale Semiconductor, MPC8560PX833LC Datasheet - Page 79

IC MPU PWRQUICC III 783-FCPBGA

MPC8560PX833LC

Manufacturer Part Number
MPC8560PX833LC
Description
IC MPU PWRQUICC III 783-FCPBGA
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MPC8560PX833LC

Processor Type
MPC85xx PowerQUICC III 32-Bit
Speed
833MHz
Voltage
1.2V
Mounting Type
Surface Mount
Package / Case
783-FCPBGA
Family Name
MPC85XX
Device Core
PowerQUICC III
Device Core Size
32b
Frequency (max)
833MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
1.2V
Operating Supply Voltage (max)
1.26V
Operating Supply Voltage (min)
1.14V
Operating Temp Range
0C to 105C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
783
Package Type
FCBGA
For Use With
MPC8560ADS-BGA - BOARD APPLICATION DEV 8560
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-
Lead Free Status / Rohs Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MPC8560PX833LC
Manufacturer:
MOTOROLA
Quantity:
453
Part Number:
MPC8560PX833LC
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MPC8560PX833LC
Manufacturer:
FREESCALE
Quantity:
20 000
15 Clocking
This section describes the PLL configuration of the device. Note that the platform clock is identical to the
CCB clock.
15.1
Table 55
specifications for the memory bus.
Freescale Semiconductor
e500 core processor frequency
Notes:
1. Caution: The CCB to SYSCLK ratio and e500 core to CCB ratio settings must be chosen such that the resulting SYSCLK
2.)The minimum e500 core frequency is based on the minimum platform frequency of 200 MHz.
3.)The 1.0 GHz core frequency is based on a 1.3 V VDD supply voltage.
Memory bus frequency
Notes:
1. Caution: The CCB to SYSCLK ratio and e500 core to CCB ratio settings must be chosen such that the resulting SYSCLK
2. The memory bus speed is half of the DDR data rate, hence, half of the platform clock frequency.
3.)The 1.0 GHz core frequency is based on a 1.3 V VDD supply voltage.
frequency, e500 (core) frequency, and CCB frequency do not exceed their respective maximum or minimum operating
frequencies. Refer to
frequency, e500 (core) frequency, and CCB frequency do not exceed their respective maximum or minimum operating
frequencies. Refer to
Characteristic
Characteristic
provides the clocking specifications for the processor core and
Clock Ranges
Section 15.2, “Platform/System PLL
Section 15.2, “Platform/System PLL
MPC8560 Integrated Processor Hardware Specifications, Rev. 5
Table 55. Processor Core Clocking Specifications
Table 56. Memory Bus Clocking Specifications
Min
400
Min
100
667 MHz
667 MHz
Maximum Processor Core Frequency
Max
Maximum Processor Core Frequency
Max
667
166
Ratio,” and
Ratio,” and
Min
400
Min
100
833 MHz
833 MHz
Section 15.3, “e500 Core PLL
Section 15.3, “e500 Core PLL
Max
Max
833
166
Min
400
Min
100
Table 56
1 GHz
1 GHz
1000
Max
Max
166
provides the clocking
Ratio,” for ratio settings.
Ratio,” for ratio settings.
MHz
MHz
Unit
Unit
1, 2, 3
Notes
1, 2, 3
Notes
Clocking
79

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