MC68040FE25A Freescale Semiconductor, MC68040FE25A Datasheet - Page 58

• Manufacturer Part Number: MC68040FE25A
• Description: IC MICROPROCESSOR 32BIT 184-CQFP
• Manufacturer: Freescale Semiconductor

Specifications of MC68040FE25A

• Processor Type: M680x0 32-Bit
• Speed: 25MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 184-CQFP
• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 25MHz
• Instruction Set Architecture: RISC
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 184
• Package Type: CQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

The seven bits of a logical address PI field are multiplied by 4 (shifted to the left by two
bits) and concatenated with the fetched root-level descriptor’s upper 23 bits to produce the
physical address of the pointer-level table descriptor. Each of the 128 pointer-level table
descriptors corresponds to a 256-Kbyte block of memory.
For 8-Kbyte pages, the five bits of the PGI field are multiplied by 4 (shifted to the left by
two bits) and concatenated with the fetched pointer-level descriptor’s upper 25 bits to
produce the physical address of the 8-Kbyte page descriptor. The upper 19 bits of the
page descriptor are the page frame’s physical address. There are 32 8-Kbyte page
descriptors in a page-level table.
Similarly, for 4-Kbyte pages, the six bits of the PGI field are multiplied by 4 (shifted to the
left by two bits) and concatenated with the fetched pointer-level descriptor’s upper 24 bits
to produce the physical address of the 4-Kbyte page descriptor. The upper 20 bits of the
page descriptor are the page frame’s physical address. There are 64 4-Kbyte page
descriptors in a page-level table.
Write-protect status is accumulated from each level’s descriptor and combined with the
status from the page descriptor to form the ATC entry status. The M68040 creates the
ATC entry from the page frame address and the associated status bits and retries the
original bus access. Refer to 3.3 Address Translation Caches for details on ATC entries.
If the descriptor from a page table is an indirect descriptor, the page descriptor pointed to
by this descriptor is fetched. Invalid descriptors can be used at any level of the tree except
the root. When a table search for a normal translation encounters an invalid descriptor, the
processor takes an access fault exception. The invalid descriptor can be used to identify
either a page or branch of the tree that has been stored on an external device and is not
resident in memory or a portion of the translation table that has not yet been defined. In
these two cases, the exception routine can either restore the page from disk or add to the
translation table. Figures 3-9 and 3-10 illustrate detailed flowcharts of table search and
descriptor fetch operations.
A table search terminates successfully when a page descriptor is encountered. The
occurrence of an invalid descriptor or a transfer error acknowledge also terminates a table
search, and the M68040 takes an exception on the retry of the cycle because of these
conditions. The exception handler should distinguish between anticipated conditions and
true error conditions. The exception handler can correct an invalid descriptor that indicates
a nonresident page or one that identifies a portion of the translation table yet to be
allocated. An access error due to a system malfunction can require the exception handler
to write an error message and terminate the task.
MOTOROLA
31
ROOT INDEX FIELD
7 BITS
(RI)
25 24
Freescale Semiconductor, Inc.
POINTER INDEX FIELD
For More Information On This Product,
Figure 3-8. Logical Address Format
7 BITS
(PI)
Go to: www.freescale.com
M68040 USER'S MANUAL
18 17
PAGE INDEX FIELD
8K PAGE
4K PAGE
(PGI)
13 12 11
8K PAGE
4K PAGE
PAGE OFFSET
0
3- 9