MC68040FE25A Freescale Semiconductor, MC68040FE25A Datasheet - Page 441

• Manufacturer Part Number: MC68040FE25A
• Description: IC MICROPROCESSOR 32BIT 184-CQFP
• Manufacturer: Freescale Semiconductor

Specifications of MC68040FE25A

• Processor Type: M680x0 32-Bit
• Speed: 25MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 184-CQFP
• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 25MHz
• Instruction Set Architecture: RISC
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 184
• Package Type: CQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

Rounding Algorithm, 9-14
Rounding Mode, 9-3, 9-13, 9-16, 9-24, 9-37
Rounding Precision, 9-3, 9-13, 9-33, 9-37, 9-16
SAMPLE/PRELOAD, 6-3
Self-Modifying Code, 4-10
Shadow Registers, 2-1
SHUTDOWN, 6-3, 6-12
Signals
INDEX-6
Overflow And Underflow, 9-16, 9-30
Forced, 9-31, 9-34
A31–A0, 7-1
AVEC, 7-33, 7-34
BB, 7-45–7-58
BCLK, 6-12, 7-1
BG, 7-45–7-58
BR, 7-45–7-58
CDIS, 4-5, 5-4, 5-5, 7-67, 7-69
CIOUT, 4-7
D31–D0, 7-1
DLE, 1-1, 1-2, 5-5, A-5, B-5
IPEND, 5-12, 7-29
IPL≈, 7-2, 7-29, 7-34, 7-67, 5-11, 6-5, 8-12,
JS0, 1-1, 1-2, A-5, B-5, B-8
JS1, 1-2, B-5, B-8
LOCK, 3-21, 4-13, 7-26, 7-45–7-58
LOCKE, 7-26, 7-45–7-58, 7-54
MDIS, 1-2, 3-1, 3-5, 3-32, 5-5, 7-67, B-5, B-8
MI, 7-60
PCLK, 6-12, 7-1
PSTx, 8-18
Relationship to System CLOCKs, 7-2
RSTI, 3-32, 6-5, 6-6, 6-13, 7-2, 7-66, 7-67,
RSTO, 8-18
SCx, 4-3, 7-60; Encodings 4-9
SIZx, 4-13, 7-3, 7-7; Encodings 4-11
TA, 4-11, 4-12, 4-13, 8-9, 8-12, 7-60, 8-9,
TBI, 4-3, 4-11, 4-12, 4-13, 7-10, 7-20, 7-60
TCI, 4-11, 4-12
TCK, 6-2, 6-4, 6-6, 6-12
TDI, 6-2
TDO, 6-2, 6-4, 6-6
10-8, A-5, B-8
8-17, B-8
8-12, 9-20
–S–
Freescale Semiconductor, Inc.
For More Information On This Product,
M68040 USER’S MANUAL
Go to: www.freescale.com
Signal Descriptions, 5-2–5-3
Sink Data, 4-1, 4-9, 5-8
Small Output Buffer, A-5
Snoop Controller, 1-4, 5-7
Snooping, 4-1, 5-9
Snoop-Inhibited Operation, 7-61
Snooped External Read, 4-8
Source Data, 4-1, 4-8, 4-10, 5-8
Stack Frames
State Data, 4-1, 5-9
State Frames, see Floating-Point State Frames
Sticky Bit, 9-6
Supervisor Address Space, 3-23, 8-4
Supervisor Mode, see Privilege Modes
Synchronization, 7-44
Synchronizer Circuit, 7-58
Table Descriptor, see Descriptors
Table Search, 3-9, 3-12, 3-24, 3-28
TAP Controller, 6-1, 6-2, 6-6, 6-13
TAP Controller States, 6-3–6-4
Tag Entry, see Address Translation Cache Entry
Thermal Management, 11-29, 11-30, 11-31
TEA, 4-12, 4-13, 7-60, 8-6, 8-7, 8-9,
TLNx Encodings, 4-11
TMS, 6-2, 6-4
TMx, 4-13, 5-6
TRST, 6-2, 6-4, 6-13
TS, 7-60
UPAx, 3-5, 3-15, 3-28,7-60, B-6
Cache Coherency, 4-10
Logic, 1-1, 1-5
Operation, 5-9
Access Error, 3-22, 8-20, A-7, B-11;
Floating-Point Post-Instruction, A-7, B-11
Format $0, 8-21
Format $1, 8-21
Format $2, 8-22, 9-21, 9-22
Format $3, 8-23, 9-31, 9-32, 9-35, 9-38
Format $4, 8-23, A-5, B-11
Format $7, 8-24
MC68LC040, A-5
MC68EC040, B-11
SSW Field Format Defined, 8-24–8-26
8-12, 9-20
Fields Defined 8-24–8-27
–T–
MOTOROLA