MC68040FE25A Freescale Semiconductor, MC68040FE25A Datasheet - Page 202

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MC68040FE25A

Manufacturer Part Number
MC68040FE25A
Description
IC MICROPROCESSOR 32BIT 184-CQFP
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC68040FE25A

Processor Type
M680x0 32-Bit
Speed
25MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
184-CQFP
Family Name
M68000
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
25MHz
Instruction Set Architecture
RISC
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
184
Package Type
CQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68040FE25A
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Freescale Semiconductor, Inc.
7.9.1 Snoop-Inhibited Cycle
For alternate bus master accesses in which the SCx signal encodings indicate that
snooping is inhibited (SCx = $0), the M68040 immediately negates MI and allows memory
to respond to the access. Snoop-inhibited alternate bus master accesses do not affect
performance of the processor since no cache lookups are required. Figure 7-40 illustrates
an example of a snoop-inhibited operation in which an alternate bus master is granted the
bus for an access. No matter what the values are on the SCx and TTx signals, MI is
asserted between bus cycles. Because MI is asserted while a cache lookup is performed,
snooping inherently degrades system performance.
MI is asserted from the last TA of the current bus cycle if the M68040 owns the bus and
loses it (see Figure 7-40). If an alternate bus master has the bus and loses it, there are
two different resulting cases. Usually, an idle clock occurs between the alternate bus
master’s cycle and the MC68040’s cycle. If so, MI is asserted during the idle clock and
negated from the same edge that the M68040 asserts the TS signal (see Figure 7-40). If
there is no idle clock, MI is not asserted. MI is asserted during and after reset until the first
bus cycle of the M68040. Even though snoop is inhibited, all TA or TEA assertions while
MI is asserted are ignored. If a line snoop is started, the M68040 still requires four TA
assertions.
7-60
M68040 USER’S MANUAL
MOTOROLA
For More Information On This Product,
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