MC68EC040RC40A Freescale Semiconductor, MC68EC040RC40A Datasheet - Page 291

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MC68EC040RC40A

Manufacturer Part Number
MC68EC040RC40A
Description
IC MPU 32BIT 40MHZ 179-PGA
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC68EC040RC40A

Processor Type
M680x0 32-Bit
Speed
40MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
179-PGA
Lead Free Status / RoHS Status
Contains lead / RoHS Compliant
Features
-
MOTOROLA
NOTE: If the M68040FPSP unimplemented exception handler is used, the above state frame
CMDREG1B
FPTEMP
STAG
E1
T
CMDREG3B
WBTEMP
WBTE15
WBTM1, WBTM0,
SBIT
E3
T
CMDREG1B
FPTEMP
STAG
E1
T
FSAVE State
Frame Field
information applies. The CMDREG1B or CMDREG3B fields of the state frame are modified as
appropriate to encode the unimplemented instruction opcode. It is the user exception handler’s
responsibility to use the E3 and E1 field encodings to recognize which state frame information
applies. When E3 = 1 and E1 = 1, E3 takes priority and the state frame information for E3 = 1
must be used.
Table 9-16. State Frame Field Information (Concluded)
Exception Instruction Command Word
Source Operand Tag = Normalized
Always 1
Always 0
Encoded Exception Instruction Command Word
exponent, and 64-bit mantissa prior to rounding.
Either 1 or 0, generally useless for INEX exceptions.
Guard, round, and sticky of intermediate result’s 67-bit mantissa.
Always 1
Either 1 or 0
FMOVE Instruction Command Word
Source Operand Tag = Normalized
Always 1
Always 1
Unrounded, Extended-Precision Intermediate Result
WBTS, WBTE, and WBTM = intermediate result sign, biased 15-bit
Intermediate result with mantissa prior to rounding.
Freescale Semiconductor, Inc.
For More Information On This Product,
INEX (FADD, FSUB, FMUL, FDIV, and FSQRT)
INEX (FMOVE to Register, FABS, and FNEG)
Go to: www.freescale.com
M68040 USER’S MANUAL
INEX (FMOVE to Memory)
Contents
9- 47

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