MPC850DSLZQ50BU Freescale Semiconductor, MPC850DSLZQ50BU Datasheet - Page 15

IC MPU PWRQUICC 50MHZ 256-PBGA

MPC850DSLZQ50BU

Manufacturer Part Number
MPC850DSLZQ50BU
Description
IC MPU PWRQUICC 50MHZ 256-PBGA
Manufacturer
Freescale Semiconductor
Datasheets

Specifications of MPC850DSLZQ50BU

Processor Type
MPC8xx PowerQUICC 32-Bit
Speed
50MHz
Voltage
3.3V
Mounting Type
Surface Mount
Package / Case
256-PBGA
Family Name
MPC8xx
Device Core
PowerQUICC
Device Core Size
32b
Frequency (max)
50MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
3.3V
Operating Supply Voltage (max)
3.465V
Operating Supply Voltage (min)
3.135V
Operating Temp Range
0C to 95C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
256
Package Type
BGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-
Lead Free Status / Rohs Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MPC850DSLZQ50BU
Quantity:
2
Part Number:
MPC850DSLZQ50BU
Manufacturer:
FREESCAL
Quantity:
364
Part Number:
MPC850DSLZQ50BU
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MPC850DSLZQ50BU
Manufacturer:
FREESCALE
Quantity:
20 000
Freescale Semiconductor
Num
B29h
B30a
B30b
B30c
B30d
B29i
B30
MPC850 PowerQUICC™ Integrated Communications Processor Hardware Specifications, Rev. 2
WE[0–3] negated to D[0–31],
DP[0–3] high-Z GPCM write
access TRLX = 0, CSNT = 1,
EBDF = 1
CS negated to D[0–31],
DP[0–3] high-Z GPCM write
access, TRLX = 1, CSNT = 1,
ACS = 10 or ACS = 11, EBDF =
1
CS, WE[0–3] negated to
A[6–31] invalid
GPCM write access
WE[0–3] negated to A[6–31]
invalid
GPCM write access, TRLX = 0,
CSNT = 1, CS negated to
A[6–31] invalid GPCM write
access TRLX = 0, CSNT =1,
ACS = 10 or ACS = 11, EBDF =
0
WE[0–3] negated to A[6–31]
invalid
GPCM write access, TRLX = 1,
CSNT = 1. CS negated to
A[6–31] Invalid GPCM write
access TRLX = 1, CSNT = 1,
ACS = 10 or ACS = 11, EBDF =
0
WE[0–3] negated to A[6–31]
invalid
GPCM write access, TRLX = 0,
CSNT = 1. CS negated to
A[6–31] invalid GPCM write
access, TRLX = 0, CSNT = 1,
ACS = 10 or ACS = 11, EBDF =
1
WE[0–3] negated to A[6–31]
invalid GPCM write access
TRLX = 1, CSNT =1, CS
negated to A[6–31] invalid
GPCM write access TRLX = 1,
CSNT = 1, ACS = 10 or ACS =
11, EBDF = 1
Characteristic
9
Table 6. Bus Operation Timing
25.00
25.00
28.00
25.00
3.00
8.00
5.00
Min
50 MHz
Max
39.00
39.00
13.00
43.00
39.00
6.00
8.00
Min
66 MHz
Max
1
(continued)
31.00
31.00
36.00
31.00
11.00
4.00
6.00
Min
80 MHz
Max
FFACT
1.375
1.375
0.250
0.500
1.500
0.375
1.375
Cap Load
(default
50 pF)
50.00
50.00
50.00
50.00
50.00
50.00
50.00
Bus Signal Timing
Unit
ns
ns
ns
ns
ns
ns
ns
15

Related parts for MPC850DSLZQ50BU