IDT79RC32K438-300BBG IDT, Integrated Device Technology Inc, IDT79RC32K438-300BBG Datasheet - Page 7

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IDT79RC32K438-300BBG

Manufacturer Part Number
IDT79RC32K438-300BBG
Description
IC MPU 32BIT CORE 300MHZ 416-BGA
Manufacturer
IDT, Integrated Device Technology Inc
Series
Interprise™r
Datasheet

Specifications of IDT79RC32K438-300BBG

Processor Type
MIPS32 32-Bit
Speed
300MHz
Voltage
1.3V
Mounting Type
Surface Mount
Package / Case
416-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Other names
79RC32K438-300BBG

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
IDT79RC32K438-300BBG
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
IDT 79RC32438
PCIREQN[3:0]
PCIRSTN
PCISERRN
PCISTOPN
PCITRDYN
General Purpose Input/Output
GPIO[0]
GPIO[1]
GPIO[2]
GPIO[3]
GPIO[4]
GPIO[5]
Signal
Type
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
PCI Bus Request.
In PCI host mode with internal arbiter:
These signals are inputs whose assertion indicates to the internal RC32438
arbiter that an agent desires ownership of the PCI bus.
In PCI host mode with external arbiter:
PCIREQN[0]: asserted by the RC32438 to request ownership of the PCI bus.
PCIREQN[3:1]: unused and driven high.
In PCI satellite mode:
PCIREQN[0]: this signal is asserted by the RC32438 to request use of the PCI
bus.
PCIREQN[1]: function changes to PCIIDSEL and is used as a chip select during
configuration read and write transactions.
PCIREQN[3:2]: unused and driven high.
Note: When the GPIO register is programmed in the alternate function mode for
bits GPIO [24] and [27], these bits become PCIREQN [4] and [5] respectively.
PCI Reset. In host mode, this signal is asserted by the RC32438 to generate a
PCI reset. In satellite mode, assertion of this signal initiates a warm reset.
PCI System Error. This signal is driven by an agent to indicate an address par-
ity error, data parity error during a special cycle command, or any other system
error. Requires an external pull-up.
PCI Stop. Driven by the bus target to terminate the current bus transaction. For
example, to indicate a retry.
PCI Target Ready. Driven by the bus target to indicate that the current data can
complete.
General Purpose I/O.
This pin can be configured as a general purpose I/O pin.
Alternate function pin name: U0SOUT
Alternate function: UART channel 0 serial output.
General Purpose I/O.
This pin can be configured as a general purpose I/O pin.
Alternate function pin name: U0SINP
Alternate function: UART channel 0 serial input.
General Purpose I/O.
This pin can be configured as a general purpose I/O pin.
Alternate function pin name: U0RIN
Alternate function: UART channel 0 ring indicator input.
General Purpose I/O.
This pin can be configured as a general purpose I/O pin.
Alternate function pin name: U0DCDN
Alternate function: UART channel 0 data carrier detect input.
General Purpose I/O.
This pin can be configured as a general purpose I/O pin.
Alternate function pin name: U0DTRN
Alternate function: UART channel 0 data terminal ready input.
General Purpose I/O.
This pin can be configured as a general purpose I/O pin.
Alternate function pin name: U0DSRN
Alternate function: UART channel 0 data set ready input.
Table 1 Pin Description (Part 4 of 9)
7 of 59
Name/Description
May 25, 2004

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