EZ80L92AZ020EC00TR Zilog, EZ80L92AZ020EC00TR Datasheet - Page 52

IC EZ80 MPU 100LQFP

EZ80L92AZ020EC00TR

Manufacturer Part Number
EZ80L92AZ020EC00TR
Description
IC EZ80 MPU 100LQFP
Manufacturer
Zilog
Datasheet

Specifications of EZ80L92AZ020EC00TR

Processor Type
eZ80
Features
High Speed, Single-Cycle Instruction-Fetch
Speed
20MHz
Voltage
3.3V
Mounting Type
Surface Mount
Package / Case
100-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
EZ80L92AZ020EC00T

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Part Number
Manufacturer
Quantity
Price
Part Number:
EZ80L92AZ020EC00TR
Manufacturer:
Zilog
Quantity:
10 000
Table 12. Vectored Interrupt Operation (Continued)
PS013014-0107
Memory
Mode
ADL Mode
Z80 Mode
ADL
Bit
1
0
MADL
Bit
0
1
Operation
Read the LSB of the interrupt vector placed on the internal vectored
interrupt bus, IVECT [7:0], by the interrupting peripheral.
Read the LSB of the interrupt vector placed on the internal vectored
interrupt bus, IVECT[7:0], bus by the interrupting peripheral.
IEF1 ← 0
IEF2 ← 0
The starting Program Counter is PC[23:0].
Push the 3-byte return address, PC[23:0], onto the SPL stack.
The ADL mode bit remains set to 1.
The interrupt vector address is located at { 00h, I[7:0], IVECT[7:0] }.
PC[15:0] ← ( { 00h, I[7:0], IVECT[7:0] } ).
The ending Program Counter is { 00h, PC[15:0] }.
The interrupt service routine must end with RETI.
IEF1
IEF2
The starting Program Counter is effectively {MBASE, PC[15:0]}.
Push the 2-byte return address, PC[15:0], onto the SPL stack.
Push a 00h byte onto the SPL stack to indicate an interrupt from Z80
mode (because ADL = 0).
Set the ADL mode bit to 1.
The interrupt vector address is located at { 00h, I[7:0], IVECT[7:0] }.
PC[15:0] ← ( { 00h, I[7:0], IVECT[7:0] } ).
The ending Program Counter is { 00h, PC[15:0] }.
The interrupt service routine must end with RETI.L
0
0
Product Specification
Interrupt Controller
eZ80L92 MCU
®
46

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