EZ80L92AZ020EC00TR Zilog, EZ80L92AZ020EC00TR Datasheet - Page 203
EZ80L92AZ020EC00TR
Manufacturer Part Number
EZ80L92AZ020EC00TR
Description
IC EZ80 MPU 100LQFP
Manufacturer
Zilog
Datasheet
1.EZ80L92AZ020SG.pdf
(231 pages)
Specifications of EZ80L92AZ020EC00TR
Processor Type
eZ80
Features
High Speed, Single-Cycle Instruction-Fetch
Speed
20MHz
Voltage
3.3V
Mounting Type
Surface Mount
Package / Case
100-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
EZ80L92AZ020EC00T
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Table 115. Opcode Map—Fourth Byte After 0FDh, 0CBh, and dd*
Legend
PS013014-0107
First Operand
of Fourth
C
D
0
1
2
3
4
5
6
7
8
9
A
B
E
F
Nibble
Upper
Notes: d = 8-bit two’s-complement displacement.
Byte
0
Lower Nibble of 4th Byte
4
1
0,(IY+d)
BIT
6
2
Second Operand
Mnemonic
3
4
5
RES 0,
RES 2,
RES 4,
RES 6,
SET 0,
SET 2,
SET 4,
SET 6,
(IY+d)
(IY+d)
(IY+d)
BIT 0,
(IY+d)
BIT 2,
(IY+d)
BIT 4,
(IY+d)
BIT 6,
(IY+d)
(IY+d)
(IY+d)
(IY+d)
(IY+d)
(IY+d)
(IY+d)
(IY+d)
(IY+d)
RLC
SLA
RL
Lower Nibble (Hex)
6
7
8
9
A
B
Product Specification
C
eZ80L92 MCU
D
RES 1,
RES 3,
RES 5,
RES 7,
SET 1,
SET 3,
SET 5,
SET 7,
Opcode Map
(IY+d)
(IY+d)
(IY+d)
(IY+d)
BIT 1,
(IY+d)
BIT 3,
(IY+d)
BIT 5,
(IY+d)
BIT 7,
(IY+d)
(IY+d)
(IY+d)
(IY+d)
(IY+d)
(IY+d)
(IY+d)
(IY+d)
(IY+d)
RRC
SRA
SRL
RR
E
F
197
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