EZ80L92AZ050SG Zilog, EZ80L92AZ050SG Datasheet - Page 225
![IC WEBSERVER 50MHZ 100LQFP](/photos/6/76/67664/269-100-lqfp_sml.jpg)
EZ80L92AZ050SG
Manufacturer Part Number
EZ80L92AZ050SG
Description
IC WEBSERVER 50MHZ 100LQFP
Manufacturer
Zilog
Datasheet
1.EZ80L92AZ020SG.pdf
(231 pages)
Specifications of EZ80L92AZ050SG
Processor Type
eZ80
Features
High Speed, Single-Cycle Instruction-Fetch
Speed
50MHz
Voltage
3.3V
Mounting Type
Surface Mount
Package / Case
100-LQFP
Processor Series
EZ80L92x
Core
eZ80
Data Bus Width
8 bit
Program Memory Size
64 KB
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
24
Number Of Timers
6
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Development Tools By Supplier
eZ80L920210ZCO
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
269-3878
EZ80L92AZ050SG
EZ80L92AZ050SG
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EZ80L92AZ050SG
Manufacturer:
Everlight
Quantity:
12 000
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Clock Synchronization 142
Clocking Overview 139
Continuous Mode 79
CPHA 129, 135
CPHA bit 132
CPOL 130, 135
CPOL bit 132
CS0 9, 22, 48, 49, 50, 51
CS1 9, 22, 48, 49, 50, 51
CS2 9, 22, 48, 50, 51
CS3 9, 22, 48, 50, 51
CTS 118, 121
CTS0 14, 125
CTS1 16
Customer Feedback Form 225
D
DATA bus 61
Data Bus 10
data bus 53, 56, 57, 58, 65, 71, 90, 167, 176, 181
Data Carrier Detect 15, 17, 121
Data Set Ready 14, 17, 121
Data Terminal Ready 14, 17, 118
Data Transfer Procedure with SPI configured as a
Data Transfer Procedure with SPI Configured as the
data transfer, SPI 136
Data Validity 140
DATA0 10, 22
DATA1 10, 22
DATA2 10, 22
DATA3 10, 22
DATA4 10, 22
DATA5 10, 22
DATA6 10, 22
DATA7 10, 22
DC Characteristics 201
DCD 118, 121
DCD0 15, 125
DCD1 17
DCTS 121
DDCD 121
PS013014-0107
Slave 134
Master 133
DDSR 121
DSR 118, 121
DSR0 14, 125
DSR1 17
DTACK 64, 65
DTR 118, 121
DTR0 14, 125
DTR1 17
E
Edge-Triggered Interrupts 41
EI, Op Code Map 191
Electrical Characteristics 201
Enabling and Disabling the WDT 74
Event Counter 81
External Bus Acknowledge Timing 214
External I/O Read Timing 208
External I/O Write Timing 209
External Memory Read Timing 205
External Memory Write Timing 206
External System Clock Driver (PHI) Timing 214
eZ80 CPU 33, 34, 51, 53, 57, 58, 64, 65, 123, 169,
eZ80 CPU Core 31
eZ80 Product ID Low and High Byte Registers 178
eZ80 Product ID Revision Register 179
eZ80 Webserver-i 1, 4, 5, 10, 11, 12, 20, 25, 33, 34,
eZ80 Webserver-i Block Diagram 3
eZ80L92 MCU 3
F
f 21, 22, 54, 57
FAST mode 139, 158
Features 1
Features, eZ80 CPU Core 31
full-duplex transmission 131
Functional Description, Infrared Encoder/Decoder
183
38, 44, 45, 48, 50, 73, 77, 80, 107, 109, 151,
158, 161, 162, 163, 165, 166, 169, 172, 173,
176, 177, 178, 179, 182, 186, 201, 203, 214, 216
123
Product Specification
Index
219
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