EZ80L92AZ050SG Zilog, EZ80L92AZ050SG Datasheet - Page 183
![IC WEBSERVER 50MHZ 100LQFP](/photos/6/76/67664/269-100-lqfp_sml.jpg)
EZ80L92AZ050SG
Manufacturer Part Number
EZ80L92AZ050SG
Description
IC WEBSERVER 50MHZ 100LQFP
Manufacturer
Zilog
Datasheet
1.EZ80L92AZ020SG.pdf
(231 pages)
Specifications of EZ80L92AZ050SG
Processor Type
eZ80
Features
High Speed, Single-Cycle Instruction-Fetch
Speed
50MHz
Voltage
3.3V
Mounting Type
Surface Mount
Package / Case
100-LQFP
Processor Series
EZ80L92x
Core
eZ80
Data Bus Width
8 bit
Program Memory Size
64 KB
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
24
Number Of Timers
6
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Development Tools By Supplier
eZ80L920210ZCO
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
269-3878
EZ80L92AZ050SG
EZ80L92AZ050SG
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EZ80L92AZ050SG
Manufacturer:
Everlight
Quantity:
12 000
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PS013014-0107
Table 98. Instruction Store 4:0 Registers (ZDI_IS4 = 21h, ZDI_IS3 = 22h,
ZDI_IS2 = 23h, ZDI_IS1 = 24h, and ZDI_IS0 = 25h in the ZDI Register Write-
Only Address Space)
ZDI Write Memory Register
A Write to the ZDI Write Memory register causes the eZ80L92 to write the 8-bit data to
the memory location specified by the current address in the program counter. In Z80
MEMORY mode, this address is {MBASE, PC[15:0]}. In ADL MEMORY mode, this
address is PC[23:0]. The program counter, PC, increments after each data Write. However,
the ZDI register address does not increment automatically when this register is accessed.
As a result, the ZDI master is allowed to write any number of data bytes by writing to this
address one time followed by any number of data bytes. See
Table 99. ZDI Write Memory Register (ZDI_WR_MEM = 30h in the ZDI
Register Write-Only Address Space)
Bit
Reset
CPU Access
Note: X = Undefined; W = Write.
Bit
Position
[7:0]
ZDI_IS4,
ZDI_IS3,
ZDI_IS2,
ZDI_IS1,
or
ZDI_IS0
Bit
Reset
CPU Access
Note: X = Undefined; W = Write.
00h–FFh These registers contain the Op Codes and operands
Value
W
W
X
X
7
7
Description
for immediate execution by the CPU following a Write
to ZDI_IS0. The ZDI_IS0 register contains the first Op
Code of the instruction. The remaining ZDI_ISx
registers contain any additional Op Codes or operand
dates required for execution of the required instruction.
W
W
X
X
6
6
W
W
X
X
5
5
W
W
X
X
4
4
W
W
X
X
3
Table
3
Product Specification
99.
W
W
X
X
2
2
ZiLOG Debug Interface
eZ80L92 MCU
W
W
X
X
1
1
W
W
X
X
0
0
177
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