STPCI2GDYI STMicroelectronics, STPCI2GDYI Datasheet - Page 41

• Manufacturer Part Number: STPCI2GDYI
• Description: IC SYSTEM-ON-CHIP X86 516-PBGA
• Manufacturer: STMicroelectronics

Specifications of STPCI2GDYI

• Applications: Graphics Controller
• Core Processor: x86
• Controller Series: STPC® Atlas
• Interface: UART
• Number Of I /o: 16
• Voltage - Supply: 2.45 V ~ 2.7 V
• Operating Temperature: -40°C ~ 115°C
• Mounting Type: Surface Mount
• Package / Case: 516-PBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Program Memory Type: -
• Ram Size: -
• Lead Free Status / Rohs Status: Compliant

3.1.4. STRAP REGISTER 2
This register is read only with the exception of bit 4
Bit Number Sampled
STRAP2
MD[53]
7
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
MD[52]
6
This register defaults to the values sampled on the MD pins after reset
Mnemonic
MD[53]
MD[52]
MD[20]
MD[19]
MD[18]
MD[51]
MD[50]
Rsv
RSV
5
Access = 0022h/0023h
Description
This bit reflects the value sampled on MD[53] pin and determines
whether the internal Parallel Port Controller is used
This bit reflects the value sampled on MD[52] pin and determines
whether the internal Keyboard controller is used
Reserved
This bit reflects the value sampled on MD[20] pin and controls the Dot
clock pin (DCLK) direction as follows:
This bit reflects the value sampled on MD[19] pin and controls the
Memory clock output pin (MCLKO) as follows:
This bit reflects the value sampled on MD[18] pin and controls the Host
clock pin (HCLK) direction as follows:
This bit reflects the value sampled on MD[51] pin and determines
whether the internal UART1 is enabled:
This bit reflects the value sampled on MD[50] pin and determines
whether the internal UART2 is enabled:
0: Internal Parallel Port Controller is disabled
1: Internal Parallel Port Controller is enabled
0: Internal Keyboard Controller is disabled
1: Internal Keyboard Controller is enabled
0: Input.
1: Output of the internal frequency synthesizer DCLK PLL.
0: Tristated.
1: Output of the internal frequency synthesizer MCLKO PLL.
0: Input.
1: Output of the internal frequency synthesizer HCLK PLL.
0: Internal UART1 is disabled
1: Internal UART1 is enabled
0: Internal UART2 is disabled
1: Internal UART2 is enabled
MD[20]
4
MD[19]
3
MD[18]
2
MD[51]
1
STPC® ATLAS
Regoffset =04Ch
MD[50]
0
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