STPCI2GDYI STMicroelectronics, STPCI2GDYI Datasheet - Page 36

• Manufacturer Part Number: STPCI2GDYI
• Description: IC SYSTEM-ON-CHIP X86 516-PBGA
• Manufacturer: STMicroelectronics

Specifications of STPCI2GDYI

• Applications: Graphics Controller
• Core Processor: x86
• Controller Series: STPC® Atlas
• Interface: UART
• Number Of I /o: 16
• Voltage - Supply: 2.45 V ~ 2.7 V
• Operating Temperature: -40°C ~ 115°C
• Mounting Type: Surface Mount
• Package / Case: 516-PBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Program Memory Type: -
• Ram Size: -
• Lead Free Status / Rohs Status: Compliant

STPC® ATLAS
3 STRAP OPTION
This chapter defines the STPC
Atlas Strap Options and their
locations. Some strap options
36/108
1
Note
PCMCIA, Local Bus).
Note
Signal
1
2
MD[4]
MD[5]
MD[6]
MD[7]
MD[8]
MD[9]
MD10
MD11
MD12
MD13
MD14
MD15
MD16
MD17
MD18
MD19
MD20
MD21
MD23
MD24
MD25
MD26
MD27
MD28
MD29
MD30
MD31
MD32
MD33
MD34
MD35
MD36
MD37
MD38
MD40
MD1
MD2
MD3
: Strap options on TC/PA[3] and DACK_ENC[2:0]/PA[2:0] are required for all the STPC Atlas Configurations (ISA,
: Must be implemented.
MCLK Synchro (see
Local Bus Boot Device Size
ISA / PCMCIA / Local Bus
PCI_CLKO Programming
CPU clock Multiplication
CPU clock Multiplication
MCLK Pad Direction
HCLK Pad Direction
DCLK Pad Direction
PCI_CLKO Divisor
PCI_CLKO Divisor
HCLK PLL Speed
HCLK Speed
Designation
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
are left programmable for future
versions of silicon. The strap
options
Section 3.1.1.
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
are
)
sampled
Not accessible
Not accessible
Not accessible
Not accessible
Not accessible
Not accessible
Not accessible
Not accessible
Not accessible
Not accessible
Not accessible
Not accessible
Not accessible
Not accessible
Index 4C,bit 2
Index 4C,bit 3
Index 4C,bit 4
Index 5F,bit 6
Index 5F,bit 7
Index 4A,bit 1
Index 4A,bit 2
Index 4A,bit 6
Index 4A,bit 7
Index 4A,bit 3
Index 4A,bit 3
Index 4B,bit 2
Index 4B,bit 3
Index 4B,bit 4
Index 4B,bit 5
Index 4B,bit 6
Index 4A,bit 0
Index 5F,bit 0
Index 5F,bit 2
Index 5F,bit 3
Index 5F,bit 4
Index 5F,bit 5
Index 4B,bit 0
Index 4B,bit 7
Location
at
a
User defined
User defined
User defined
User defined
User defined
User defined
User defined
User defined
User defined
User defined
User defined
User defined
User defined
Pull-down
Pull down
Pull down
Pull down
Pull down
Settings
Pull Up
Pull-up
Pull-up
Pull-up
Pull-up
specific
process. This is shown in detail
in
Actual
Pull up
Pull up
Pull up
Pull up
Pull up
Pull up
Pull up
Pull up
Pull up
Pull up
Pull up
Pull up
Pull up
Pull up
Pull up
Figure 4-3
point
Set to ’0’
Async
See
See
See
See
See
See
See
See
Input
Input
8-bit
Hi-Z
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Section 3.1.1.
Section 3.1.1.
Section 3.1.1.
Section 3.1.1.
Section 3.1.3
Section 3.1.2
Section 3.1.3
Section 3.1.2
of
the
Set to ’1’
Output
Output
Output
16-bit
Sync
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
boot