PNX1702EH/G,557 NXP Semiconductors, PNX1702EH/G,557 Datasheet - Page 212
PNX1702EH/G,557
Manufacturer Part Number
PNX1702EH/G,557
Description
IC MEDIA PROC 500MHZ 456-BGA
Manufacturer
NXP Semiconductors
Datasheet
1.PNX1702EHG557.pdf
(832 pages)
Specifications of PNX1702EH/G,557
Applications
Multimedia
Core Processor
TriMedia
Controller Series
Nexperia
Ram Size
208K x 8
Interface
I²C, 2-Wire Serial
Number Of I /o
61
Voltage - Supply
1.33 V ~ 1.47 V
Operating Temperature
0°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
456-HBGA
Operating Temperature (min)
0C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Program Memory Type
-
Lead Free Status / Rohs Status
Compliant
Other names
935281647557
PNX1702EH/G
PNX1702EH/G
PNX1702EH/G
PNX1702EH/G
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Philips Semiconductors
Volume 1 of 1
PNX17XX_SER_1
Preliminary data sheet
Table 3: Default DDR SDRAM Timing Parameters
Table 4: CAS Latency Related DDR SDRAM Timing Parameters
Parameter
tRCD read
tRCD write
tRRD
tMRD
tWTR
tWR
tRP
tRAS
tRFC
tRC
Parameter
PRECHARGE_BIT
tCAS
3. Configure the MMI with default DDR SDRAM timing parameter settings that
support as many DRAM vendors as possible. It is recommended to verify these
default parameters comply with the DDR SDRAM devices used to build the
PNX17xx Series system board. Not all the MMI parameters are initialized in the
boot scripts some are the reset defaults of the MMI module. The
summarizes the values of DDR SDRAM timing parameters once the
configurations of the MMI is completed by the boot. It is then the TM5250 or the
host CPU that is in charge to fine tune these parameters by re-programming the
MMI module according to the DDR SDRAM devices used on the PNX17xx Series
system board. Furthermore ROW_WIDTH and COLUMN_WIDTH have been set
to 11 and 8, respectively, which allows the use of any kind of DDR SDRAM
densities and configurations during the boot process (i.e. in standalone only 8
Kilobytes of data is written to memory). Finally, some parameters are dependant
on the CAS latency of the devices. After review of different DDR SDRAM device
datasheets, it is found that devices organized in x32 support, at least, CAS
latencies of 3.0. Similarly the devices organized in x16 support at least a CAS
latencies of 2.5. In addition to the CAS latencies the x32 and x16 devices require
some different settings for the auto-precharge bit. Therefore PNX17xx Series
BOOT_MODE[3] pin is also used to determine if a x32 or x16 devices are used in
the board system. This assumption is not bullet proof but works for most of the
DDR SDRAM vendors.The boot scripts assume a x32 device when CAS latency
is 3.0 and a x16 device when the latency is 2.5.
parameters affected by the BOOT_MODE[3] pin, a.k.a. CAS_LATENCY.
Rev. 1 — 17 March 2006
CAS_LATENCY = 3.0
8
6
Value (Clocks)
4
4
4
4
1
3
4
9
15
13
Table 4
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
CAS_LATENCY = 2.5
10
5
PNX17xx Series
Chapter 6: Boot Module
shows the MMI
Table 3
6-7
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