PNX1502E/G,557 NXP Semiconductors, PNX1502E/G,557 Datasheet - Page 17

• Manufacturer Part Number: PNX1502E/G,557
• Description: IC MEDIA PROC 300MHZ 456-BGA
• Manufacturer: NXP Semiconductors

Specifications of PNX1502E/G,557

• Applications: Multimedia
• Core Processor: TriMedia
• Controller Series: Nexperia
• Interface: I²C, 2-Wire Serial
• Number Of I /o: 61
• Voltage - Supply: 1.23 V ~ 1.37 V
• Operating Temperature: 0°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 456-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Program Memory Type: -
• Ram Size: -
• Lead Free Status / Rohs Status: Compliant
• Other names: 568-1298; 935277748557; PNX1502E/G

NXP Semiconductors
Volume 1 of 1
Chapter 18: SPDIF Input
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Chapter 19: Memory Based Scaler
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Chapter 20: 2D Drawing Engine
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Chapter 21: MPEG-1 and MPEG-2 Variable Length Decoder
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Chapter 22: Digital Video Disc Descrambler
Chapter 23: LAN100 — Ethernet Media Access Controller
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Chapter 24: TM3260 Debug
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Chapter 25: I
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Chapter 26: Memory Arbiter
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PNX15XX_PNX952X_SER_N_4
Product data sheet
SPDIF Input Block Diagram
Serial Format of an IEC60958 Block
SPDIF Input: Raw Mode Format
560
Endian Mode Byte Address Memory Format
561
MBS Top Level
MBS Horizontal Processing Pipeline
2D Drawing Engine Block Diagram
VLD Block Diagram
MPEG-2 Macro Block Header Output Format
659
Simplified LAN100 I/O Block Diagram
LAN100 Functional Block Diagram
Pattern matching join function
Receive descriptor memory layout
Transmit Descriptor Memory Layout
Transmit example memory and registers
Transmit example waves
Receive example memory and registers
State Diagram of TAP Controller
System with JTAG Access
SDA First Transmitted Byte
Arbitration Scheme
SPDIF Input Sample Order View of Memory
MBS Block Diagram
2
C Interface
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Rev. 4.0 — 03 December 2007
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PNX15xx/952x Series
SPDIF Input Oversampling Clock Generation
563
Lock/Unlock Processing for SPDIF Input
SPDIF Input Consumer interface
SPDIF Input MMIO Registers (1 of 2)
SPDIF Input MMIO Registers (2 of 2)
MBS Vertical Processing Pipeline
Task FIFO and Linked List
Measurement in the MBS
MPEG-1 Macro Block Header Output Format
660
Receive example waves
Real-time/non-real-time transmit example
QoS transmission example
Transmit flow control
Receive filter block diagram
Receive Active/Inactive state machine
Transmit Active/Inactive state machine
Additional JTAG Data and Control Registers
754
Connected Media Processor
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© NXP B.V. 2007. All rights reserved.
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