XC4VFX100-10FFG1517I Xilinx Inc, XC4VFX100-10FFG1517I Datasheet - Page 295

• Manufacturer Part Number: XC4VFX100-10FFG1517I
• Description: IC FPGA VIRTEX-4FX 100K 1517FBGA
• Manufacturer: Xilinx Inc
• Series: Virtex™-4r

Specifications of XC4VFX100-10FFG1517I

• Number Of Logic Elements/cells: 94896
• Number Of Labs/clbs: 10544
• Total Ram Bits: 6930432
• Number Of I /o: 768
• Voltage - Supply: 1.14 V ~ 1.26 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 1517-BBGA, FCBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -

Virtex-4 FPGA User Guide
UG070 (v2.6) December 1, 2008
R
Transmitter Termination
Receiver Termination
The Virtex-4 FPGA LVDS transmitter does not require any external termination.
lists the allowed attributes corresponding to the Virtex-4 FPGA LVDS current-mode
drivers. Virtex-4 FPGA LVDS current-mode drivers are a true current source and produce
the proper (EIA/TIA compliant) LVDS signal.
LVDS_25_DCI, LVDSEXT_25_DCI Usage
LVDS_25_DCI and LVDSEXT_25_DCI provide split termination for the P and N inputs
only. VRP and VRN should connect to 50Ω resistors.
Equivalently, it provides 100Ω differential impedance between the LVDS inputs.
Figure 6-73
on a board with 50Ω transmission lines.
External Termination
DCI
LVDS_25
LVDS_25
and
Figure 6-74
Figure 6-74: LVDS_25_DCI Receiver Termination
Figure 6-73: LVDS_25 Receiver Termination
IOB
Specific Guidelines for Virtex-4 FPGA I/O Supported Standards
IOB
www.xilinx.com
are examples of differential termination for an LVDS receiver
R DIFF = 2Z 0 = 100Ω
Z 0
Z 0
Z 0
Z 0
IOB
V
V
CCO
CCO
2R
2R
2R
2R
= 2.5V
= 2.5V
VRP
VRN
VRP
VRN
IOB
= 2Z 0 = 100Ω
= 2Z 0 = 100Ω
= 2Z 0 = 100Ω
= 2Z 0 = 100Ω
+
LVDS_25
LVDS_25_DCI
ug070_6_71_071904
+
ug070_6_72_071904
Table 6-33
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