XC3S50AN-4TQG144I Xilinx Inc, XC3S50AN-4TQG144I Datasheet - Page 34
![IC FPGA SPARTAN-3AN50K 144-TQFP](/photos/6/70/67094/144tqfp_sml.jpg)
XC3S50AN-4TQG144I
Manufacturer Part Number
XC3S50AN-4TQG144I
Description
IC FPGA SPARTAN-3AN50K 144-TQFP
Manufacturer
Xilinx Inc
Series
Spartan™-3ANr
Datasheets
1.XC3S50A-4VQG100C.pdf
(7 pages)
2.XC3S50AN-4TQG144C.pdf
(2 pages)
3.XC3S50AN-4TQG144C.pdf
(123 pages)
Specifications of XC3S50AN-4TQG144I
Total Ram Bits
55296
Number Of Logic Elements/cells
1584
Number Of Labs/clbs
176
Number Of I /o
108
Number Of Gates
50000
Voltage - Supply
1.14 V ~ 1.26 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
144-LQFP
No. Of Logic Blocks
176
No. Of Gates
50000
No. Of Macrocells
1584
Family Type
Spartan-3AN
No. Of Speed Grades
4
No. Of I/o's
108
Clock
RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
122-1597
XC3S50AN-4TQG144I
XC3S50AN-4TQG144I
Available stocks
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Part Number:
XC3S50AN-4TQG144I
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XILINX/赛灵思
Quantity:
20 000
Table 25: Propagation Times for the IOB Input Path (Cont’d)
DS557 (v4.1) April 1, 2011
Product Specification
Notes:
1.
2.
T
IOPLID
Symbol
The numbers in this table are tested using the methodology presented in
Table 10
This propagation time requires adjustment whenever a signal standard other than LVCMOS25 is assigned to the data Input. When this is
true, add the appropriate Input adjustment from
and
The time it takes for data to travel
from the Input pin through the IFF
latch to the I output with the input
delay programmed
Table
13.
Description
Table
LVCMOS25
Conditions
26.
www.xilinx.com
Spartan-3AN FPGA Family: DC and Switching Characteristics
(2)
Table 30
DELAY_VALUE
1
2
3
4
5
6
7
8
and are based on the operating conditions set forth in
XC3S1400AN
Device
Max
1.93
2.69
3.52
3.89
3.95
4.53
5.30
5.83
-5
Speed
Grade
Max
2.40
3.15
3.99
4.55
4.42
5.32
6.21
6.80
-4
Units
ns
ns
ns
ns
ns
ns
ns
ns
34