XC3S50-4VQG100I Xilinx Inc, XC3S50-4VQG100I Datasheet - Page 51

• Manufacturer Part Number: XC3S50-4VQG100I
• Description: SPARTAN-3A FPGA 50K STD 100-VQFP
• Manufacturer: Xilinx Inc
• Series: Spartan™-3r

Specifications of XC3S50-4VQG100I

• Total Ram Bits: 73728
• Number Of Logic Elements/cells: 1728
• Number Of Labs/clbs: 192
• Number Of I /o: 63
• Number Of Gates: 50000
• Voltage - Supply: 1.14 V ~ 1.26 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 100-TQFP
• No. Of Logic Blocks: 192
• No. Of Gates: 50000
• No. Of Macrocells: 1728
• Family Type: Spartan-3
• No. Of Speed Grades: 4
• No. Of I/o's: 63
• Clock Management: DLL
• Package: 100VTQFP
• Family Name: Spartan®-3
• Device Logic Units: 1728
• Device System Gates: 50000
• Maximum Internal Frequency: 630 MHz
• Typical Operating Supply Voltage: 1.2 V
• Maximum Number Of User I/os: 63
• Ram Bits: 73728
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

DS099-2 (v2.5) December 4, 2009
Product Specification
R
Figure 28: Boundary-Scan Configuration Flow Diagram
No
No
and V
(JTAG port becomes
Load configuration
and V
INIT_B = High?
(Clock five 1's
Load JSTART
Load CFG_IN
Reconfigure?
Synchronous
configuration
data frames
User mode
V
instruction
Power-On
Yes
instruction
TAP reset
sequence
CCO
mode pins
Yes
Yes
available)
on TMS)
Start-Up
correct?
CCINT
memory
Sample
CCAUX
Clear
CRC
Bank 4 > 1V
>1V
> 2V
Yes
No
www.xilinx.com
No
INIT_B goes Low.
Abort Start-Up
Shutdown
sequence
Yes
Set PROG_B Low
after Power-On
PROG_B = Low
Spartan-3 FPGA Family: Functional Description
No
JShutdown
instruction
Load
DS099_27_041103
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