XC3S50-4VQG100I Xilinx Inc, XC3S50-4VQG100I Datasheet - Page 178

• Manufacturer Part Number: XC3S50-4VQG100I
• Description: SPARTAN-3A FPGA 50K STD 100-VQFP
• Manufacturer: Xilinx Inc
• Series: Spartan™-3r

Specifications of XC3S50-4VQG100I

• Total Ram Bits: 73728
• Number Of Logic Elements/cells: 1728
• Number Of Labs/clbs: 192
• Number Of I /o: 63
• Number Of Gates: 50000
• Voltage - Supply: 1.14 V ~ 1.26 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 100-TQFP
• No. Of Logic Blocks: 192
• No. Of Gates: 50000
• No. Of Macrocells: 1728
• Family Type: Spartan-3
• No. Of Speed Grades: 4
• No. Of I/o's: 63
• Clock Management: DLL
• Package: 100VTQFP
• Family Name: Spartan®-3
• Device Logic Units: 1728
• Device System Gates: 50000
• Maximum Internal Frequency: 630 MHz
• Typical Operating Supply Voltage: 1.2 V
• Maximum Number Of User I/os: 63
• Ram Bits: 73728
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Spartan-3 FPGA Family: Pinout Descriptions
Table 104: User I/Os Per Bank for XC3S1500 in FG676 Package
Table 105: User I/Os Per Bank for XC3S2000, XC3S4000, and XC3S5000 in FG676 Package
178
Bottom
Bottom
Edge
Edge
Right
Right
Left
Left
Top
Top
I/O Bank
Bank
I/O
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
Maximum
Maximum
I/O
I/O
62
61
60
60
63
61
60
60
62
61
61
60
63
61
61
60
I/O
I/O
52
51
52
52
47
45
52
52
52
51
53
52
47
45
53
52
www.xilinx.com
DUAL
DUAL
0
0
0
0
6
6
0
0
0
0
0
0
6
6
0
0
All Possible I/O Pins by Type
All Possible I/O Pins by Type
DCI
DCI
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
DS099-4 (v2.5) December 4, 2009
VREF
VREF
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
Product Specification
GCLK
GCLK
2
2
0
0
2
2
0
0
2
2
0
0
2
2
0
0
R